Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3f177625 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin
Browse files

drm/i915: Add wait_for_us 



This is for callers who want micro-second precision but are not
waiting from the atomic context.

v2:
  * Fix atomic waits. (Dave Gordon)
  * Use USEC_PER_SEC and USEC_PER_MSEC. (Chris Wilson)

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Dave Gordon <david.s.gordon@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 782d25ca

drivers/gpu/drm/i915/intel_dp.c

+2 −2
Original line number Diff line number Diff line
@@ -1792,11 +1792,11 @@ static void wait_panel_status(struct intel_dp *intel_dp, 
			I915_READ(pp_stat_reg),

			I915_READ(pp_ctrl_reg));



	if (_wait_for((I915_READ(pp_stat_reg) & mask) == value, 5000, 10)) {

	if (_wait_for((I915_READ(pp_stat_reg) & mask) == value,

		      5 * USEC_PER_SEC, 10 * USEC_PER_MSEC))

		DRM_ERROR("Panel status timeout: status %08x control %08x\n",

				I915_READ(pp_stat_reg),

				I915_READ(pp_ctrl_reg));

	}



	DRM_DEBUG_KMS("Wait complete\n");

}

drivers/gpu/drm/i915/intel_drv.h

+8 −7
Original line number Diff line number Diff line
@@ -45,8 +45,8 @@ 
 * having timed out, since the timeout could be due to preemption or similar and

 * we've never had a chance to check the condition before the timeout.

 */

#define _wait_for(COND, MS, W) ({ \

	unsigned long timeout__ = jiffies + msecs_to_jiffies(MS) + 1;	\

#define _wait_for(COND, US, W) ({ \

	unsigned long timeout__ = jiffies + usecs_to_jiffies(US) + 1;	\

	int ret__ = 0;							\

	while (!(COND)) {						\

		if (time_after(jiffies, timeout__)) {			\
@@ -55,7 +55,7 @@ 
			break;						\

		}							\

		if ((W) && drm_can_sleep()) {				\

			usleep_range((W)*1000, (W)*2000);		\

			usleep_range((W), (W)*2);			\

		} else {						\

			cpu_relax();					\

		}							\
@@ -63,10 +63,11 @@ 
	ret__;								\

})



#define wait_for(COND, MS) _wait_for(COND, MS, 1)

#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)

#define wait_for_atomic_us(COND, US) _wait_for((COND), \

					       DIV_ROUND_UP((US), 1000), 0)

#define wait_for(COND, MS)	  	_wait_for((COND), (MS) * 1000, 1000)

#define wait_for_us(COND, US)	  	_wait_for((COND), (US), 1)



#define wait_for_atomic(COND, MS) 	_wait_for((COND), (MS) * 1000, 0)

#define wait_for_atomic_us(COND, US)	_wait_for((COND), (US), 0)



#define KHz(x) (1000 * (x))

#define MHz(x) KHz(1000 * (x))

drivers/gpu/drm/i915/intel_psr.c

+2 −1
Original line number Diff line number Diff line
@@ -507,7 +507,8 @@ static void hsw_psr_disable(struct intel_dp *intel_dp) 


		/* Wait till PSR is idle */

		if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL) &

			       EDP_PSR_STATUS_STATE_MASK) == 0, 2000, 10))

			       EDP_PSR_STATUS_STATE_MASK) == 0,

			       2 * USEC_PER_SEC, 10 * USEC_PER_MSEC))

			DRM_ERROR("Timed out waiting for PSR Idle State\n");



		dev_priv->psr.active = false;