Loading qcom/monaco-rumi.dtsi +29 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,35 @@ status = "disabled"; }; usb_emu_phy_0: usb_emu_phy@0x04f20000 { compatible = "qcom,usb-emu-phy"; reg = <0x04e0e000 0x9500>; qcom,emu-init-seq = <0xfff0 0x4 0xfff3 0x4 0xfff0 0x4 0x100000 0x20 0x0 0x20 0x1e0 0x20 0x100000 0x3c 0x0 0x3c 0x4 0x3c 0x0 0x4 0x9 0x14>; }; }; &usb0 { dpdm-supply = <&usb_nop_phy>; dwc3@4e00000 { usb-phy = <&usb_emu_phy_0>, <&usb_nop_phy>; maximum-speed = "high-speed"; dr_mode = "peripheral"; }; }; &usb2_phy0 { status = "disabled"; }; &sdhc_1 { Loading qcom/monaco-usb.dtsi 0 → 100644 +136 −0 Original line number Diff line number Diff line #include <dt-bindings/clock/qcom,gcc-monaco.h> #include <dt-bindings/interconnect/qcom,monaco.h> &soc { /* Primary USB port related controller */ usb0: hsusb@4e00000 { compatible = "qcom,dwc-usb3-msm"; reg = <0x4e00000 0x100000>; reg-names = "core_base"; iommus = <&apps_smmu 0x120 0x0>; qcom,iommu-dma = "atomic"; qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>; #address-cells = <1>; #size-cells = <1>; ranges; dma-ranges; interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "pwr_event_irq", "hs_phy_irq"; clocks = <&gcc GCC_USB20_MASTER_CLK>, <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>, <&gcc GCC_SYS_NOC_USB2_PRIM_AXI_CLK>, <&gcc GCC_USB2_PRIM_CLKREF_CLK>, <&gcc GCC_USB20_SLEEP_CLK>, <&gcc GCC_USB20_MOCK_UTMI_CLK>; clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "xo", "sleep_clk", "utmi_clk"; resets = <&gcc GCC_USB20_PRIM_BCR>; reset-names = "core_reset"; USB3_GDSC-supply = <&gcc_usb20_prim_gdsc>; qcom,usb-charger; qcom,core-clk-rate = <60000000>; qcom,default-bus-vote = <2>; /* use svs bus voting */ interconnect-names = "usb-ddr", "usb-ipa", "ddr-usb"; interconnects = <&system_noc MASTER_USB3 &bimc SLAVE_EBI_CH0>, <&system_noc MASTER_USB3 &config_noc SLAVE_IPA_CFG>, <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_USB3>; qcom,interconnect-values-svs = /* SVS Votes */ <30000 70000>, <0 2400>, <0 40000>; qcom,num-gsi-evt-buffs = <0x3>; qcom,gsi-reg-offset = <0x0fc /* GSI_GENERAL_CFG */ 0x110 /* GSI_DBL_ADDR_L */ 0x120 /* GSI_DBL_ADDR_H */ 0x130 /* GSI_RING_BASE_ADDR_L */ 0x144 /* GSI_RING_BASE_ADDR_H */ 0x1a4>; /* GSI_IF_STS */ qcom,dwc-usb3-msm-tx-fifo-size = <10488>; dwc3@4e00000 { compatible = "snps,dwc3"; reg = <0x4e00000 0xcd00>; interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy0>, <&usb_nop_phy>; tx-fifo-resize; linux,sysdev_is_parent; snps,disable-clk-gating; snps,is-utmi-l1-suspend; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; snps,dis_u2_susphy_quirk; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x0>; maximum-speed = "high-speed"; dr_mode = "otg"; }; qcom,usbbam@0x04f04000 { compatible = "qcom,usb-bam-msm"; reg = <0x04f04000 0x17000>; interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; qcom,usb-bam-fifo-baseaddr = <0xc121000>; qcom,usb-bam-num-pipes = <4>; qcom,disable-clk-gating; qcom,usb-bam-override-threshold = <0x4001>; qcom,usb-bam-max-mbps-highspeed = <400>; qcom,reset-bam-on-connect; qcom,pipe0 { label = "hsusb-qdss-in-0"; qcom,usb-bam-mem-type = <2>; qcom,dir = <1>; qcom,pipe-num = <0>; qcom,peer-bam = <0>; qcom,peer-bam-physical-address = <0x08064000>; qcom,src-bam-pipe-index = <0>; qcom,dst-bam-pipe-index = <0>; qcom,data-fifo-offset = <0x0>; qcom,data-fifo-size = <0x1800>; qcom,descriptor-fifo-offset = <0x1800>; qcom,descriptor-fifo-size = <0x800>; }; }; }; /* Primary USB port related High Speed PHY */ usb2_phy0: hsphy@1613000 { compatible = "qcom,usb-hsphy-snps-femto"; reg = <0x1613000 0x120>, <0x01612000 0x4>; reg-names = "hsusb_phy_base", "eud_enable_reg"; vdd-supply = <&L12A>; vdda18-supply = <&L14A>; vdda33-supply = <&L25A>; qcom,vdd-voltage-level = <0 904000 904000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "ref_clk_src"; resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; qcom,param-override-seq = <0x63 0x6c /* override_x0 */ 0xC8 0x70 /* override_x1 */ 0x17 0x74>; /* override x2 */ }; usb_nop_phy: usb_nop_phy { compatible = "usb-nop-xceiv"; }; }; qcom/monaco.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1236,6 +1236,7 @@ #include "monaco-qupv3.dtsi" #include "monaco-pm.dtsi" #include "monaco-audio.dtsi" #include "monaco-usb.dtsi" &qupv3_se6_2uart { status = "ok"; Loading Loading
qcom/monaco-rumi.dtsi +29 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,35 @@ status = "disabled"; }; usb_emu_phy_0: usb_emu_phy@0x04f20000 { compatible = "qcom,usb-emu-phy"; reg = <0x04e0e000 0x9500>; qcom,emu-init-seq = <0xfff0 0x4 0xfff3 0x4 0xfff0 0x4 0x100000 0x20 0x0 0x20 0x1e0 0x20 0x100000 0x3c 0x0 0x3c 0x4 0x3c 0x0 0x4 0x9 0x14>; }; }; &usb0 { dpdm-supply = <&usb_nop_phy>; dwc3@4e00000 { usb-phy = <&usb_emu_phy_0>, <&usb_nop_phy>; maximum-speed = "high-speed"; dr_mode = "peripheral"; }; }; &usb2_phy0 { status = "disabled"; }; &sdhc_1 { Loading
qcom/monaco-usb.dtsi 0 → 100644 +136 −0 Original line number Diff line number Diff line #include <dt-bindings/clock/qcom,gcc-monaco.h> #include <dt-bindings/interconnect/qcom,monaco.h> &soc { /* Primary USB port related controller */ usb0: hsusb@4e00000 { compatible = "qcom,dwc-usb3-msm"; reg = <0x4e00000 0x100000>; reg-names = "core_base"; iommus = <&apps_smmu 0x120 0x0>; qcom,iommu-dma = "atomic"; qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>; #address-cells = <1>; #size-cells = <1>; ranges; dma-ranges; interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "pwr_event_irq", "hs_phy_irq"; clocks = <&gcc GCC_USB20_MASTER_CLK>, <&gcc GCC_CFG_NOC_USB2_PRIM_AXI_CLK>, <&gcc GCC_SYS_NOC_USB2_PRIM_AXI_CLK>, <&gcc GCC_USB2_PRIM_CLKREF_CLK>, <&gcc GCC_USB20_SLEEP_CLK>, <&gcc GCC_USB20_MOCK_UTMI_CLK>; clock-names = "core_clk", "iface_clk", "bus_aggr_clk", "xo", "sleep_clk", "utmi_clk"; resets = <&gcc GCC_USB20_PRIM_BCR>; reset-names = "core_reset"; USB3_GDSC-supply = <&gcc_usb20_prim_gdsc>; qcom,usb-charger; qcom,core-clk-rate = <60000000>; qcom,default-bus-vote = <2>; /* use svs bus voting */ interconnect-names = "usb-ddr", "usb-ipa", "ddr-usb"; interconnects = <&system_noc MASTER_USB3 &bimc SLAVE_EBI_CH0>, <&system_noc MASTER_USB3 &config_noc SLAVE_IPA_CFG>, <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_USB3>; qcom,interconnect-values-svs = /* SVS Votes */ <30000 70000>, <0 2400>, <0 40000>; qcom,num-gsi-evt-buffs = <0x3>; qcom,gsi-reg-offset = <0x0fc /* GSI_GENERAL_CFG */ 0x110 /* GSI_DBL_ADDR_L */ 0x120 /* GSI_DBL_ADDR_H */ 0x130 /* GSI_RING_BASE_ADDR_L */ 0x144 /* GSI_RING_BASE_ADDR_H */ 0x1a4>; /* GSI_IF_STS */ qcom,dwc-usb3-msm-tx-fifo-size = <10488>; dwc3@4e00000 { compatible = "snps,dwc3"; reg = <0x4e00000 0xcd00>; interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy0>, <&usb_nop_phy>; tx-fifo-resize; linux,sysdev_is_parent; snps,disable-clk-gating; snps,is-utmi-l1-suspend; snps,dis-u1-entry-quirk; snps,dis-u2-entry-quirk; snps,dis_u2_susphy_quirk; snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x0>; maximum-speed = "high-speed"; dr_mode = "otg"; }; qcom,usbbam@0x04f04000 { compatible = "qcom,usb-bam-msm"; reg = <0x04f04000 0x17000>; interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>; qcom,usb-bam-fifo-baseaddr = <0xc121000>; qcom,usb-bam-num-pipes = <4>; qcom,disable-clk-gating; qcom,usb-bam-override-threshold = <0x4001>; qcom,usb-bam-max-mbps-highspeed = <400>; qcom,reset-bam-on-connect; qcom,pipe0 { label = "hsusb-qdss-in-0"; qcom,usb-bam-mem-type = <2>; qcom,dir = <1>; qcom,pipe-num = <0>; qcom,peer-bam = <0>; qcom,peer-bam-physical-address = <0x08064000>; qcom,src-bam-pipe-index = <0>; qcom,dst-bam-pipe-index = <0>; qcom,data-fifo-offset = <0x0>; qcom,data-fifo-size = <0x1800>; qcom,descriptor-fifo-offset = <0x1800>; qcom,descriptor-fifo-size = <0x800>; }; }; }; /* Primary USB port related High Speed PHY */ usb2_phy0: hsphy@1613000 { compatible = "qcom,usb-hsphy-snps-femto"; reg = <0x1613000 0x120>, <0x01612000 0x4>; reg-names = "hsusb_phy_base", "eud_enable_reg"; vdd-supply = <&L12A>; vdda18-supply = <&L14A>; vdda33-supply = <&L25A>; qcom,vdd-voltage-level = <0 904000 904000>; clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "ref_clk_src"; resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; qcom,param-override-seq = <0x63 0x6c /* override_x0 */ 0xC8 0x70 /* override_x1 */ 0x17 0x74>; /* override x2 */ }; usb_nop_phy: usb_nop_phy { compatible = "usb-nop-xceiv"; }; };
qcom/monaco.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1236,6 +1236,7 @@ #include "monaco-qupv3.dtsi" #include "monaco-pm.dtsi" #include "monaco-audio.dtsi" #include "monaco-usb.dtsi" &qupv3_se6_2uart { status = "ok"; Loading