Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 39333610 authored by Nicolas Ferre's avatar Nicolas Ferre
Browse files

Merge branches 'at91-3.18-cleanup' and 'at91-3.18-dt' into at91-3.18-drivers

parents 7d1311b9 2626063f 464d6e18

arch/arm/boot/dts/at91sam9263.dtsi

+7 −3
Original line number Diff line number Diff line
@@ -345,10 +345,14 @@ 
				};

			};



			ramc: ramc@ffffe200 {

			ramc0: ramc@ffffe200 {

				compatible = "atmel,at91sam9260-sdramc";

				reg = <0xffffe200 0x200

				       0xffffe800 0x200>;

				reg = <0xffffe200 0x200>;

			};



			ramc1: ramc@ffffe800 {

				compatible = "atmel,at91sam9260-sdramc";

				reg = <0xffffe800 0x200>;

			};



			pit: timer@fffffd30 {

arch/arm/boot/dts/at91sam9g45.dtsi

+8 −2
Original line number Diff line number Diff line
@@ -96,8 +96,14 @@ 


			ramc0: ramc@ffffe400 {

				compatible = "atmel,at91sam9g45-ddramc";

				reg = <0xffffe400 0x200

				       0xffffe600 0x200>;

				reg = <0xffffe400 0x200>;

				clocks = <&ddrck>;

				clock-names = "ddrck";

			};



			ramc1: ramc@ffffe600 {

				compatible = "atmel,at91sam9g45-ddramc";

				reg = <0xffffe600 0x200>;

				clocks = <&ddrck>;

				clock-names = "ddrck";

			};

arch/arm/boot/dts/at91sam9n12.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -87,6 +87,8 @@ 
			ramc0: ramc@ffffe800 {

				compatible = "atmel,at91sam9g45-ddramc";

				reg = <0xffffe800 0x200>;

				clocks = <&ddrck>;

				clock-names = "ddrck";

			};



			pmc: pmc@fffffc00 {

arch/arm/boot/dts/at91sam9x5.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -95,6 +95,8 @@ 
			ramc0: ramc@ffffe800 {

				compatible = "atmel,at91sam9g45-ddramc";

				reg = <0xffffe800 0x200>;

				clocks = <&ddrck>;

				clock-names = "ddrck";

			};



			pmc: pmc@fffffc00 {

arch/arm/boot/dts/sama5d3.dtsi

+13 −1
Original line number Diff line number Diff line
@@ -402,8 +402,10 @@ 
			};



			ramc0: ramc@ffffea00 {

				compatible = "atmel,at91sam9g45-ddramc";

				compatible = "atmel,sama5d3-ddramc";

				reg = <0xffffea00 0x200>;

				clocks = <&ddrck>, <&mpddr_clk>;

				clock-names = "ddrck", "mpddr";

			};



			dbgu: serial@ffffee00 {
@@ -1170,6 +1172,11 @@ 
						#clock-cells = <0>;

						reg = <48>;

					};



					mpddr_clk: mpddr_clk {

						#clock-cells = <0>;

						reg = <49>;

					};

				};

			};
@@ -1178,6 +1185,11 @@ 
				reg = <0xfffffe00 0x10>;

			};



			shutdown-controller@fffffe10 {

				compatible = "atmel,at91sam9x5-shdwc";

				reg = <0xfffffe10 0x10>;

			};



			pit: timer@fffffe30 {

				compatible = "atmel,at91sam9260-pit";

				reg = <0xfffffe30 0xf>;