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Commit 464d6e18 authored by Nicolas Ferre's avatar Nicolas Ferre
Browse files
Pull AT91 ramc and reset/poweroff related DT patches from Maxim Ripard:
 "This branch gathers a few devicetree patches needed for the reworks found in
  the later patches to be sent. More precisely, it holds:
    - The addition of ddrck for the sama5d3 and the sam9 SoCs
    - The addition of the shutdown controller node in the sama5d3 DTSI
    - The slight rework of the ramc bindings for the SoCs that have several RAM
      controllers"

Conflicts:
	arch/arm/boot/dts/at91sam9g45.dtsi
parents 7d1311b9 16aa7f1f
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+7 −3
Original line number Diff line number Diff line
@@ -345,10 +345,14 @@
				};
			};

			ramc: ramc@ffffe200 {
			ramc0: ramc@ffffe200 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffe200 0x200
				       0xffffe800 0x200>;
				reg = <0xffffe200 0x200>;
			};

			ramc1: ramc@ffffe800 {
				compatible = "atmel,at91sam9260-sdramc";
				reg = <0xffffe800 0x200>;
			};

			pit: timer@fffffd30 {
+8 −2
Original line number Diff line number Diff line
@@ -96,8 +96,14 @@

			ramc0: ramc@ffffe400 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe400 0x200
				       0xffffe600 0x200>;
				reg = <0xffffe400 0x200>;
				clocks = <&ddrck>;
				clock-names = "ddrck";
			};

			ramc1: ramc@ffffe600 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe600 0x200>;
				clocks = <&ddrck>;
				clock-names = "ddrck";
			};
+2 −0
Original line number Diff line number Diff line
@@ -87,6 +87,8 @@
			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
				clocks = <&ddrck>;
				clock-names = "ddrck";
			};

			pmc: pmc@fffffc00 {
+2 −0
Original line number Diff line number Diff line
@@ -95,6 +95,8 @@
			ramc0: ramc@ffffe800 {
				compatible = "atmel,at91sam9g45-ddramc";
				reg = <0xffffe800 0x200>;
				clocks = <&ddrck>;
				clock-names = "ddrck";
			};

			pmc: pmc@fffffc00 {
+13 −1
Original line number Diff line number Diff line
@@ -402,8 +402,10 @@
			};

			ramc0: ramc@ffffea00 {
				compatible = "atmel,at91sam9g45-ddramc";
				compatible = "atmel,sama5d3-ddramc";
				reg = <0xffffea00 0x200>;
				clocks = <&ddrck>, <&mpddr_clk>;
				clock-names = "ddrck", "mpddr";
			};

			dbgu: serial@ffffee00 {
@@ -1170,6 +1172,11 @@
						#clock-cells = <0>;
						reg = <48>;
					};

					mpddr_clk: mpddr_clk {
						#clock-cells = <0>;
						reg = <49>;
					};
				};
			};

@@ -1178,6 +1185,11 @@
				reg = <0xfffffe00 0x10>;
			};

			shutdown-controller@fffffe10 {
				compatible = "atmel,at91sam9x5-shdwc";
				reg = <0xfffffe10 0x10>;
			};

			pit: timer@fffffe30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffe30 0xf>;