Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 33b7f3ee authored by Shashank Sharma's avatar Shashank Sharma Committed by Jani Nikula
Browse files

drm/i915: Add CRTC output format YCBCR 4:2:0 



Currently, we are using a bool in CRTC state (state->ycbcr420),
to indicate modeset, that the output format is YCBCR 4:2:0. Now in
order to support other YCBCR formats, we will need more such flags.

This patch adds a new enum parameter for YCBCR 4:2:0 outputs, in the
CRTC output formats and then plugs it during the modeset.

V3: Added this patch in the series, to address review comments from
    second patchset.
V4: Added r-b from Maarten (on v3)
    Addressed review comments from Ville:
        - Change the enum name to intel_output_format.
        - Start the enum value (INVALID) from 0 instaed of 1.
        - Set the crtc's output_format to RGB in encoder's compute_config.
V5: Broke previous patch 1 into two parts,
    - first patch to add CRTC output format in general
    - second patch (this one) to add YCBCR 4:2:0 output
      format specifically.
    - Use ARRAY_SIZE(format_str) for output format validity check (Ville)
V6: Added a separate function to calculate crtc_state->output_format, and
    calling it from various get_config function (Fix CI build warning)
V7: Fixed checkpatch warnings for alignment
V8: Rebase
V9: Rebase
V10: Rebase
V11: Addressed review comments from Ville:
	- Change check for CRTC output format from > ARRAY_SIZE to >= ARRAY_SIZE.
	- Check for values < INTEL_OUTPUT_FORMAT_RGB is unnecessary.
	- No need to get CRTC YCBCR config, for pre-BDW functions.
    Added Ville's r-b.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarShashank Sharma <shashank.sharma@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-2-git-send-email-shashank.sharma@intel.com
parent d9facae6

drivers/gpu/drm/i915/intel_color.c

+1 −1
Original line number Diff line number Diff line
@@ -149,7 +149,7 @@ static void ilk_load_csc_matrix(struct drm_crtc_state *crtc_state) 
	if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))

		limited_color_range = intel_crtc_state->limited_color_range;



	if (intel_crtc_state->ycbcr420) {

	if (intel_crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {

		ilk_load_ycbcr_conversion_matrix(intel_crtc);

		return;

	} else if (crtc_state->ctm) {

drivers/gpu/drm/i915/intel_ddi.c

+1 −1
Original line number Diff line number Diff line
@@ -1517,7 +1517,7 @@ static void ddi_dotclock_get(struct intel_crtc_state *pipe_config) 
	else

		dotclock = pipe_config->port_clock;



	if (pipe_config->ycbcr420)

	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)

		dotclock *= 2;



	if (pipe_config->pixel_multiplier)

drivers/gpu/drm/i915/intel_display.c

+39 −28
Original line number Diff line number Diff line
@@ -4839,7 +4839,8 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, 
		if (pixel_format == DRM_FORMAT_NV12)

			need_scaling = true;



	if (crtc_state->ycbcr420 && scaler_user == SKL_CRTC_INDEX)

	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&

	    scaler_user == SKL_CRTC_INDEX)

		need_scaling = true;



	/*
@@ -6590,7 +6591,8 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, 
		return -EINVAL;

	}



	if (pipe_config->ycbcr420 && pipe_config->base.ctm) {

	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&

	    pipe_config->base.ctm) {

		/*

		 * There is only one pipe CSC unit per pipe, and we need that

		 * for output conversion from RGB->YCBCR. So if CTM is already
@@ -7788,6 +7790,35 @@ static void chv_crtc_clock_get(struct intel_crtc *crtc, 
	pipe_config->port_clock = chv_calc_dpll_params(refclk, &clock);

}



static void intel_get_crtc_ycbcr_config(struct intel_crtc *crtc,

					struct intel_crtc_state *pipe_config)

{

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	enum intel_output_format output = INTEL_OUTPUT_FORMAT_RGB;



	if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) {

		u32 tmp = I915_READ(PIPEMISC(crtc->pipe));



		if (tmp & PIPEMISC_OUTPUT_COLORSPACE_YUV) {

			bool ycbcr420_enabled = tmp & PIPEMISC_YUV420_ENABLE;

			bool blend = tmp & PIPEMISC_YUV420_MODE_FULL_BLEND;



			if (ycbcr420_enabled) {

				/* We support 4:2:0 in full blend mode only */

				if (!blend)

					output = INTEL_OUTPUT_FORMAT_INVALID;

				else if (!(IS_GEMINILAKE(dev_priv) ||

					   INTEL_GEN(dev_priv) >= 10))

					output = INTEL_OUTPUT_FORMAT_INVALID;

				else

					output = INTEL_OUTPUT_FORMAT_YCBCR420;

			}

		}

	}



	pipe_config->output_format = output;

}



static bool i9xx_get_pipe_config(struct intel_crtc *crtc,

				 struct intel_crtc_state *pipe_config)

{
@@ -8422,9 +8453,9 @@ static void haswell_set_pipemisc(const struct intel_crtc_state *crtc_state) 
		if (crtc_state->dither)

			val |= PIPEMISC_DITHER_ENABLE | PIPEMISC_DITHER_TYPE_SP;



		if (crtc_state->ycbcr420) {

			val |= PIPEMISC_OUTPUT_COLORSPACE_YUV |

				PIPEMISC_YUV420_ENABLE |

		if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {

			val |= PIPEMISC_OUTPUT_COLORSPACE_YUV;

			val |= PIPEMISC_YUV420_ENABLE |

				PIPEMISC_YUV420_MODE_FULL_BLEND;

		}
@@ -9485,28 +9516,11 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, 
	}



	intel_get_pipe_src_size(crtc, pipe_config);

	intel_get_crtc_ycbcr_config(crtc, pipe_config);



	pipe_config->gamma_mode =

		I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;



	if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9) {

		u32 tmp = I915_READ(PIPEMISC(crtc->pipe));

		bool clrspace_yuv = tmp & PIPEMISC_OUTPUT_COLORSPACE_YUV;



		if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) >= 10) {

			bool blend_mode_420 = tmp &

					      PIPEMISC_YUV420_MODE_FULL_BLEND;



			pipe_config->ycbcr420 = tmp & PIPEMISC_YUV420_ENABLE;

			if (pipe_config->ycbcr420 != clrspace_yuv ||

			    pipe_config->ycbcr420 != blend_mode_420)

				DRM_DEBUG_KMS("Bad 4:2:0 mode (%08x)\n", tmp);

		} else if (clrspace_yuv) {

			DRM_DEBUG_KMS("YCbCr 4:2:0 Unsupported\n");

		}

	}



	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);

	if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {

		power_domain_mask |= BIT_ULL(power_domain);
@@ -10925,11 +10939,12 @@ static void snprintf_output_types(char *buf, size_t len, 
static const char * const output_format_str[] = {

	[INTEL_OUTPUT_FORMAT_INVALID] = "Invalid",

	[INTEL_OUTPUT_FORMAT_RGB] = "RGB",

	[INTEL_OUTPUT_FORMAT_YCBCR420] = "YCBCR4:2:0",

};



static const char *output_formats(enum intel_output_format format)

{

	if (format != INTEL_OUTPUT_FORMAT_RGB)

	if (format >= ARRAY_SIZE(output_format_str))

		format = INTEL_OUTPUT_FORMAT_INVALID;

	return output_format_str[format];

}
@@ -10965,9 +10980,6 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc, 
				      pipe_config->fdi_lanes,

				      &pipe_config->fdi_m_n);



	if (pipe_config->ycbcr420)

		DRM_DEBUG_KMS("YCbCr 4:2:0 output enabled\n");



	if (intel_crtc_has_dp_encoder(pipe_config)) {

		intel_dump_m_n_config(pipe_config, "dp m_n",

				pipe_config->lane_count, &pipe_config->dp_m_n);
@@ -11554,7 +11566,6 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv, 
	PIPE_CONF_CHECK_BOOL(hdmi_scrambling);

	PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);

	PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_infoframe);

	PIPE_CONF_CHECK_BOOL(ycbcr420);



	PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);

drivers/gpu/drm/i915/intel_drv.h

+1 −3
Original line number Diff line number Diff line
@@ -715,6 +715,7 @@ struct intel_crtc_wm_state { 
enum intel_output_format {

	INTEL_OUTPUT_FORMAT_INVALID,

	INTEL_OUTPUT_FORMAT_RGB,

	INTEL_OUTPUT_FORMAT_YCBCR420,

};



struct intel_crtc_state {
@@ -904,9 +905,6 @@ struct intel_crtc_state { 
	/* HDMI High TMDS char rate ratio */

	bool hdmi_high_tmds_clock_ratio;



	/* output format is YCBCR 4:2:0 */

	bool ycbcr420;



	/* Output format RGB/YCBCR etc */

	enum intel_output_format output_format;

};

drivers/gpu/drm/i915/intel_hdmi.c

+3 −3
Original line number Diff line number Diff line
@@ -478,7 +478,7 @@ static void intel_hdmi_set_avi_infoframe(struct intel_encoder *encoder, 
		return;

	}



	if (crtc_state->ycbcr420)

	if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)

		frame.avi.colorspace = HDMI_COLORSPACE_YUV420;

	else

		frame.avi.colorspace = HDMI_COLORSPACE_RGB;
@@ -1619,7 +1619,7 @@ static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state, 
		if (connector_state->crtc != crtc_state->base.crtc)

			continue;



		if (crtc_state->ycbcr420) {

		if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {

			const struct drm_hdmi_info *hdmi = &info->hdmi;



			if (bpc == 12 && !(hdmi->y420_dc_modes &
@@ -1664,7 +1664,7 @@ intel_hdmi_ycbcr420_config(struct drm_connector *connector, 
	*clock_12bpc /= 2;

	*clock_10bpc /= 2;

	*clock_8bpc /= 2;

	config->ycbcr420 = true;

	config->output_format = INTEL_OUTPUT_FORMAT_YCBCR420;



	/* YCBCR 420 output conversion needs a scaler */

	if (skl_update_scaler_crtc(config)) {