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Commit d9facae6 authored by Shashank Sharma's avatar Shashank Sharma Committed by Jani Nikula
Browse files

drm/i915: Introduce CRTC output format 



This patch adds an enum "intel_output_format" to represent
the output format of a particular CRTC. This enum will be
used to produce a RGB/YCBCR4:4:4/YCBCR4:2:0 output format
during the atomic modeset calculations.

V5:
- Created this separate patch to introduce and init output_format.
- Initialize parameters of output_format_str respectively (Jani N).
- Call it intel_output_format than crtc_output_format(Ville).
- Set output format in pipe_config for every encoder (Ville).
- Get rid of extra DRM_DEBUG_KMS during get_pipe_config (Ville)

V6: Rebase
V7: Fixed alignment warnings (checkpatch)
V8: Another check[atch warning for alignment
V9: Rebase
V10: Rebase on top of DSI restructure
V11: Addressed review comment from Ville
	- Set CRTC format for pre-HSW get_pipe_config() function too.
     Added Ville's R-B

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarShashank Sharma <shashank.sharma@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1539325394-20788-1-git-send-email-shashank.sharma@intel.com
parent a5e856a5

drivers/gpu/drm/i915/intel_crt.c

+3 −0
Original line number Diff line number Diff line
@@ -354,6 +354,7 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder, 
	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)

		return false;



	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	return true;

}
@@ -368,6 +369,7 @@ static bool pch_crt_compute_config(struct intel_encoder *encoder, 
		return false;



	pipe_config->has_pch_encoder = true;

	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;



	return true;

}
@@ -389,6 +391,7 @@ static bool hsw_crt_compute_config(struct intel_encoder *encoder, 
		return false;



	pipe_config->has_pch_encoder = true;

	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;



	/* LPT FDI RX only supports 8bpc. */

	if (HAS_PCH_LPT(dev_priv)) {

drivers/gpu/drm/i915/intel_display.c

+19 −0
Original line number Diff line number Diff line
@@ -7800,6 +7800,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, 
	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))

		return false;



	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;

	pipe_config->shared_dpll = NULL;
@@ -8849,6 +8850,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc, 
	if (!intel_display_power_get_if_enabled(dev_priv, power_domain))

		return false;



	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;

	pipe_config->shared_dpll = NULL;
@@ -9504,6 +9506,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, 
		}

	}



	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);

	if (intel_display_power_get_if_enabled(dev_priv, power_domain)) {

		power_domain_mask |= BIT_ULL(power_domain);
@@ -10919,6 +10922,18 @@ static void snprintf_output_types(char *buf, size_t len, 
	WARN_ON_ONCE(output_types != 0);

}



static const char * const output_format_str[] = {

	[INTEL_OUTPUT_FORMAT_INVALID] = "Invalid",

	[INTEL_OUTPUT_FORMAT_RGB] = "RGB",

};



static const char *output_formats(enum intel_output_format format)

{

	if (format != INTEL_OUTPUT_FORMAT_RGB)

		format = INTEL_OUTPUT_FORMAT_INVALID;

	return output_format_str[format];

}



static void intel_dump_pipe_config(struct intel_crtc *crtc,

				   struct intel_crtc_state *pipe_config,

				   const char *context)
@@ -10938,6 +10953,9 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc, 
	DRM_DEBUG_KMS("output_types: %s (0x%x)\n",

		      buf, pipe_config->output_types);



	DRM_DEBUG_KMS("output format: %s\n",

		      output_formats(pipe_config->output_format));



	DRM_DEBUG_KMS("cpu_transcoder: %s, pipe bpp: %i, dithering: %i\n",

		      transcoder_name(pipe_config->cpu_transcoder),

		      pipe_config->pipe_bpp, pipe_config->dither);
@@ -11527,6 +11545,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv, 
	PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_end);



	PIPE_CONF_CHECK_I(pixel_multiplier);

	PIPE_CONF_CHECK_I(output_format);

	PIPE_CONF_CHECK_BOOL(has_hdmi_sink);

	if ((INTEL_GEN(dev_priv) < 8 && !IS_HASWELL(dev_priv)) ||

	    IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))

drivers/gpu/drm/i915/intel_dp.c

+1 −0
Original line number Diff line number Diff line
@@ -2085,6 +2085,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, 
	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && port != PORT_A)

		pipe_config->has_pch_encoder = true;



	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	pipe_config->has_drrs = false;

	if (IS_G4X(dev_priv) || port == PORT_A)

		pipe_config->has_audio = false;

drivers/gpu/drm/i915/intel_dp_mst.c

+1 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, 
	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)

		return false;



	pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;

	pipe_config->has_pch_encoder = false;

	bpp = 24;

	if (intel_dp->compliance.test_data.bpc) {

drivers/gpu/drm/i915/intel_drv.h

+8 −0
Original line number Diff line number Diff line
@@ -712,6 +712,11 @@ struct intel_crtc_wm_state { 
	bool need_postvbl_update;

};



enum intel_output_format {

	INTEL_OUTPUT_FORMAT_INVALID,

	INTEL_OUTPUT_FORMAT_RGB,

};



struct intel_crtc_state {

	struct drm_crtc_state base;
@@ -901,6 +906,9 @@ struct intel_crtc_state { 


	/* output format is YCBCR 4:2:0 */

	bool ycbcr420;



	/* Output format RGB/YCBCR etc */

	enum intel_output_format output_format;

};



struct intel_crtc {