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Commit 2f8b1ce1 authored Feb 22, 2019 by Arnd Bergmann

Merge tag 'mvebu-fixes-5.0-2' of git://git.infradead.org/linux-mvebu into arm/fixes

mvebu fixes for 5.0 (part 2)

Fix PHY reset signal on clearfog gt 8K (Armada 8040 based)
Fix NAND description on Armada XP boards which was broken since a few
release

* tag 'mvebu-fixes-5.0-2' of git://git.infradead.org/linux-mvebu

:
  arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal
  ARM: dts: armada-xp: fix Armada XP boards NAND description

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

parents 3858bfca bdd22a41

arch/arm/boot/dts/armada-xp-db.dts

+24 −22

Original line number	Diff line number	Diff line
		@@ -144,11 +144,13 @@
		status = "okay";
		};

		nand@d0000 {
		nand-controller@d0000 {
		status = "okay";

		nand@0 {
		reg = <0>;
		label = "pxa3xx_nand-0";
		num-cs = <1>;
		marvell,nand-keep-config;
		nand-rb = <0>;
		nand-on-flash-bbt;

		partitions {
		@@ -167,7 +169,7 @@
		partition@1000000 {
		label = "Filesystem";
		reg = <0x1000000 0x3f000000>;

		};
		};
		};
		};

arch/arm/boot/dts/armada-xp-gp.dts

+8 −5

Original line number	Diff line number	Diff line
		@@ -160,14 +160,17 @@
		status = "okay";
		};

		nand@d0000 {
		nand-controller@d0000 {
		status = "okay";

		nand@0 {
		reg = <0>;
		label = "pxa3xx_nand-0";
		num-cs = <1>;
		marvell,nand-keep-config;
		nand-rb = <0>;
		nand-on-flash-bbt;
		};
		};
		};

		bm-bppi {
		status = "okay";

arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts

+44 −41

Original line number	Diff line number	Diff line
		@@ -81,11 +81,13 @@

		};

		nand@d0000 {
		nand-controller@d0000 {
		status = "okay";

		nand@0 {
		reg = <0>;
		label = "pxa3xx_nand-0";
		num-cs = <1>;
		marvell,nand-keep-config;
		nand-rb = <0>;
		nand-on-flash-bbt;

		partitions {
		@@ -129,6 +131,7 @@
		};
		};
		};
		};

		gpio-keys {
		compatible = "gpio-keys";

arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts

+1 −1

Original line number	Diff line number	Diff line
		@@ -351,7 +351,7 @@
		reg = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&cp0_copper_eth_phy_reset>;
		reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;
		reset-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
		reset-assert-us = <10000>;
		};