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Commit 2dbf45d1 authored by David S. Miller's avatar David S. Miller
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Merge tag 'mlx5-fixes-2019-09-24' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux



Saeed Mahameed says:

====================
Mellanox, mlx5 fixes 2019-09-24

This series introduces some fixes to mlx5 driver.
For more information please see tag log below.

Please pull and let me know if there is any problem.

For -stable v4.20:
 ('net/mlx5e: Fix traffic duplication in ethtool steering')

For -stable v4.19:
 ('net/mlx5: Add device ID of upcoming BlueField-2')

For -stable v5.3:
 ('net/mlx5e: Fix matching on tunnel addresses type')
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents adecda5b fe1587a7
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+2 −2
Original line number Diff line number Diff line
@@ -399,10 +399,10 @@ add_ethtool_flow_rule(struct mlx5e_priv *priv,
		      struct mlx5_flow_table *ft,
		      struct ethtool_rx_flow_spec *fs)
{
	struct mlx5_flow_act flow_act = { .flags = FLOW_ACT_NO_APPEND };
	struct mlx5_flow_destination *dst = NULL;
	struct mlx5_flow_act flow_act = {0};
	struct mlx5_flow_spec *spec;
	struct mlx5_flow_handle *rule;
	struct mlx5_flow_spec *spec;
	int err = 0;

	spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
+53 −36
Original line number Diff line number Diff line
@@ -1664,7 +1664,15 @@ static int parse_tunnel_attr(struct mlx5e_priv *priv,
		return err;
	}

	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS)) {
	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
		struct flow_match_control match;
		u16 addr_type;

		flow_rule_match_enc_control(rule, &match);
		addr_type = match.key->addr_type;

		/* For tunnel addr_type used same key id`s as for non-tunnel */
		if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
			struct flow_match_ipv4_addrs match;

			flow_rule_match_enc_ipv4_addrs(rule, &match);
@@ -1682,28 +1690,37 @@ static int parse_tunnel_attr(struct mlx5e_priv *priv,
				 dst_ipv4_dst_ipv6.ipv4_layout.ipv4,
				 ntohl(match.key->dst));

		MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP);
	} else if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS)) {
			MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c,
					 ethertype);
			MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
				 ETH_P_IP);
		} else if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
			struct flow_match_ipv6_addrs match;

			flow_rule_match_enc_ipv6_addrs(rule, &match);
			memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
					    src_ipv4_src_ipv6.ipv6_layout.ipv6),
		       &match.mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
			       &match.mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout,
								   ipv6));
			memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
					    src_ipv4_src_ipv6.ipv6_layout.ipv6),
		       &match.key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
			       &match.key->src, MLX5_FLD_SZ_BYTES(ipv6_layout,
								  ipv6));

			memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c,
					    dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
		       &match.mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
			       &match.mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout,
								   ipv6));
			memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
					    dst_ipv4_dst_ipv6.ipv6_layout.ipv6),
		       &match.key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6));
			       &match.key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout,
								  ipv6));

		MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype);
		MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6);
			MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c,
					 ethertype);
			MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
				 ETH_P_IPV6);
		}
	}

	if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_IP)) {
+1 −0
Original line number Diff line number Diff line
@@ -1568,6 +1568,7 @@ static const struct pci_device_id mlx5_core_pci_table[] = {
	{ PCI_VDEVICE(MELLANOX, 0x101e), MLX5_PCI_DEV_IS_VF},	/* ConnectX Family mlx5Gen Virtual Function */
	{ PCI_VDEVICE(MELLANOX, 0xa2d2) },			/* BlueField integrated ConnectX-5 network controller */
	{ PCI_VDEVICE(MELLANOX, 0xa2d3), MLX5_PCI_DEV_IS_VF},	/* BlueField integrated ConnectX-5 network controller VF */
	{ PCI_VDEVICE(MELLANOX, 0xa2d6) },			/* BlueField-2 integrated ConnectX-6 Dx network controller */
	{ 0, }
};

+2 −2
Original line number Diff line number Diff line
@@ -615,7 +615,7 @@ static int dr_action_handle_cs_recalc(struct mlx5dr_domain *dmn,
		 * that recalculates the CS and forwards to the vport.
		 */
		ret = mlx5dr_domain_cache_get_recalc_cs_ft_addr(dest_action->vport.dmn,
								dest_action->vport.num,
								dest_action->vport.caps->num,
								final_icm_addr);
		if (ret) {
			mlx5dr_err(dmn, "Failed to get FW cs recalc flow table\n");
@@ -744,7 +744,7 @@ int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher,
			dest_action = action;
			if (rx_rule) {
				/* Loopback on WIRE vport is not supported */
				if (action->vport.num == WIRE_PORT)
				if (action->vport.caps->num == WIRE_PORT)
					goto out_invalid_arg;

				attr.final_icm_addr = action->vport.caps->icm_address_rx;
+5 −8
Original line number Diff line number Diff line
@@ -230,8 +230,7 @@ static int dr_matcher_set_ste_builders(struct mlx5dr_matcher *matcher,
		    (dmn->type == MLX5DR_DOMAIN_TYPE_FDB ||
		     dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX)) {
			ret = mlx5dr_ste_build_src_gvmi_qpn(&sb[idx++], &mask,
							    &dmn->info.caps,
							    inner, rx);
							    dmn, inner, rx);
			if (ret)
				return ret;
		}
@@ -458,11 +457,9 @@ static int dr_matcher_add_to_tbl(struct mlx5dr_matcher *matcher)

	prev_matcher = NULL;
	if (next_matcher && !first)
		prev_matcher = list_entry(next_matcher->matcher_list.prev,
					  struct mlx5dr_matcher,
					  matcher_list);
		prev_matcher = list_prev_entry(next_matcher, matcher_list);
	else if (!first)
		prev_matcher = list_entry(tbl->matcher_list.prev,
		prev_matcher = list_last_entry(&tbl->matcher_list,
					       struct mlx5dr_matcher,
					       matcher_list);

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