clk: ingenic/jz4740: Fix incorrect dividers for main clocks
The main clocks (cclk, hclk, pclk, mclk, lcd) were using incorrect dividers, and thus reported an incorrect rate. Signed-off-by:Paul Cercueil <paul@crapouillou.net> Signed-off-by:
Stephen Boyd <sboyd@kernel.org>
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