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Commit 278e2428 authored by Jack Pham's avatar Jack Pham Committed by Gerrit - the friendly Code Review server
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usb: dwc3-msm: Clean up gsi_prepare_trbs() 



This is mostly a cosmetic change to clean up gsi_prepare_trbs()
for better readability:

 - Perform a memset() once for the entire pool instead of
   zeroing out each TRB within the loop.
 - Separate out the initialization for link TRBs and keep
   the for loops for just the normal buffer initialization

Finally, remove the final loop at the end whose only purpose
is to print the entire TRB pool contents to the kernel log.
It's just as useful to simply inspect using debugfs as every
endpoint already offers a trb_ring file.

Change-Id: Ifcd841efbd51cc3229a3d4e552a3df1ef244ce96
Signed-off-by: default avatarJack Pham <jackp@codeaurora.org>
parent 9fe55228

drivers/usb/dwc3/dwc3-msm.c

+36 −70
Original line number Diff line number Diff line
@@ -1413,8 +1413,7 @@ static int gsi_prepare_trbs(struct usb_ep *ep, struct usb_gsi_request *req) 


	buffer_addr = req->dma;



	/* Allocate and configgure TRBs */



	/* Allocate and configure TRBs */

	dep->trb_pool = dma_alloc_coherent(dwc->sysdev,

				num_trbs * sizeof(struct dwc3_trb),

				&dep->trb_pool_dma, GFP_KERNEL);
@@ -1425,6 +1424,8 @@ static int gsi_prepare_trbs(struct usb_ep *ep, struct usb_gsi_request *req) 
		goto free_trb_buffer;

	}



	memset(dep->trb_pool, 0, num_trbs * sizeof(struct dwc3_trb));



	trb0_dma = dwc3_trb_dma_offset(dep, &dep->trb_pool[0]);



	dep->num_trbs = num_trbs;
@@ -1443,85 +1444,50 @@ static int gsi_prepare_trbs(struct usb_ep *ep, struct usb_gsi_request *req) 


	/* IN direction */

	if (dep->direction) {

		for (i = 0; i < num_trbs ; i++) {

			trb = &dep->trb_pool[i];

			memset(trb, 0, sizeof(*trb));

		trb = &dep->trb_pool[0];

		/* Set up first n+1 TRBs for ZLPs */

			if (i < (req->num_bufs + 1)) {

				trb->bpl = 0;

				trb->bph = 0;

				trb->size = 0;

				trb->ctrl = DWC3_TRBCTL_NORMAL

						| DWC3_TRB_CTRL_IOC;

				continue;

			}

		for (i = 0; i < req->num_bufs + 1; i++, trb++)

			trb->ctrl = DWC3_TRBCTL_NORMAL | DWC3_TRB_CTRL_IOC;



			/* Setup n TRBs pointing to valid buffers */

		/* Setup next n TRBs pointing to valid buffers */

		for (; i < num_trbs - 1; i++, trb++) {

			trb->bpl = lower_32_bits(buffer_addr);

			trb->bph = upper_32_bits(buffer_addr);

			trb->size = 0;

			trb->ctrl = DWC3_TRBCTL_NORMAL

					| DWC3_TRB_CTRL_IOC;

			trb->ctrl = DWC3_TRBCTL_NORMAL | DWC3_TRB_CTRL_IOC;

			buffer_addr += req->buf_len;

		}



		/* Set up the Link TRB at the end */

			if (i == (num_trbs - 1)) {

		trb->bpl = lower_32_bits(trb0_dma);

		trb->bph = upper_32_bits(trb0_dma & 0xffff);

				trb->bph |= (1 << 23) | (1 << 21)

						| (req->ep_intr_num << 16);

				trb->size = 0;

				trb->ctrl = DWC3_TRBCTL_LINK_TRB

						| DWC3_TRB_CTRL_HWO;

			}

		}

		trb->bph |= (1 << 23) | (1 << 21) | (req->ep_intr_num << 16);

		trb->ctrl = DWC3_TRBCTL_LINK_TRB | DWC3_TRB_CTRL_HWO;

	} else { /* OUT direction */



		for (i = 0; i < num_trbs ; i++) {



			trb = &dep->trb_pool[i];

			memset(trb, 0, sizeof(*trb));

			/* Setup LINK TRB to start with TRB ring */

			if (i == 0) {

				trb->bpl =

					lower_32_bits(trb0_dma + sizeof(*trb));

				trb->bph =

					upper_32_bits(trb0_dma + sizeof(*trb));

		/* Start ring with LINK TRB pointing to second entry */

		trb = &dep->trb_pool[0];

		trb->bpl = lower_32_bits(trb0_dma + sizeof(*trb));

		trb->bph = upper_32_bits(trb0_dma + sizeof(*trb));

		trb->ctrl = DWC3_TRBCTL_LINK_TRB;

			} else if (i == (num_trbs - 1)) {

				/* Set up the Link TRB at the end */

				trb->bpl = lower_32_bits(trb0_dma);

				trb->bph = upper_32_bits(trb0_dma & 0xffff);

				trb->bph |= (1 << 23) | (1 << 21)

						| (req->ep_intr_num << 16);

				trb->ctrl = DWC3_TRBCTL_LINK_TRB

						| DWC3_TRB_CTRL_HWO;

			} else {



		/* Setup next n-1 TRBs pointing to valid buffers */

		for (i = 1, trb++; i < num_trbs - 1; i++, trb++) {

			trb->bpl = lower_32_bits(buffer_addr);

			trb->bph = upper_32_bits(buffer_addr);

			trb->size = req->buf_len;

			buffer_addr += req->buf_len;

				trb->ctrl = DWC3_TRBCTL_NORMAL

					| DWC3_TRB_CTRL_IOC

					| DWC3_TRB_CTRL_CSP

					| DWC3_TRB_CTRL_ISP_IMI;

			}

			trb->ctrl = DWC3_TRBCTL_NORMAL | DWC3_TRB_CTRL_IOC

				| DWC3_TRB_CTRL_CSP | DWC3_TRB_CTRL_ISP_IMI;

		}



		/* Set up the Link TRB at the end */

		trb->bpl = lower_32_bits(trb0_dma);

		trb->bph = upper_32_bits(trb0_dma & 0xffff);

		trb->bph |= (1 << 23) | (1 << 21) | (req->ep_intr_num << 16);

		trb->ctrl = DWC3_TRBCTL_LINK_TRB | DWC3_TRB_CTRL_HWO;

	}



	dev_dbg(dwc->dev, "%s: Initialized TRB Ring for %s\n",

					__func__, dep->name);

	trb = &dep->trb_pool[0];

	if (trb) {

		for (i = 0; i < num_trbs; i++) {

			dev_dbg(dwc->dev,

				"TRB %d: ADDR:%lx bpl:%x bph:%x sz:%x ctl:%x\n",

				i, (unsigned long)dwc3_trb_dma_offset(dep,

				&dep->trb_pool[i]), trb->bpl, trb->bph,

				trb->size, trb->ctrl);

			trb++;

		}

	}



	return 0;