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Commit 273a2b07 authored by Asutosh Das's avatar Asutosh Das
Browse files

ufs: qcom: port from msm-4.19 



This is a snapshot of ufs-qcom changes of msm-4.19 commit
<5e3029e3ca88>
("scsi: ufs: Add load voting for UFS's VCCQ parent regulator").
This change also contains qcom specific HSG4 changes.

Change-Id: Ib47504450419309dd3a8b291620e43c60aa16db2
Signed-off-by: default avatarAsutosh Das <asutoshd@codeaurora.org>
parent 3403df81

drivers/scsi/ufs/Kconfig

+20 −2
Original line number Diff line number Diff line
@@ -50,6 +50,24 @@ config SCSI_UFSHCD 
	  However, do not compile this as a module if your root file system

	  (the one containing the directory /) is located on a UFS device.



config SCSI_UFSHCD_QTI

	tristate "Universal Flash Storage Controller Driver Core QTI"

	depends on SCSI && SCSI_DMA && QGKI && !SCSI_UFSHCD

	select PM_DEVFREQ

	select DEVFREQ_GOV_SIMPLE_ONDEMAND

	select NLS

	help

	This selects the support for QTI UFS devices in Linux, say Y and make

	  sure that you know the name of your UFS host adapter (the card

	  inside your computer that "speaks" the UFS protocol, also

	  called UFS Host Controller), because you will be asked for it.

	  The module will be called ufshcd-qti.



	  To compile this driver as a module, choose M here and read

	  <file:Documentation/scsi/ufs.txt>.

	  However, do not compile this as a module if your root file system

	  (the one containing the directory /) is located on a UFS device.



config SCSI_UFSHCD_PCI

	tristate "PCI bus based UFS Controller support"

	depends on SCSI_UFSHCD && PCI
@@ -71,7 +89,7 @@ config SCSI_UFS_DWC_TC_PCI 


config SCSI_UFSHCD_PLATFORM

	tristate "Platform bus based UFS Controller support"

	depends on SCSI_UFSHCD

	depends on (SCSI_UFSHCD || SCSI_UFSHCD_QTI)

	---help---

	This selects the UFS host controller support. Select this if

	you have an UFS controller on Platform bus.
@@ -134,7 +152,7 @@ config SCSI_UFS_HISI 


config SCSI_UFS_BSG

	bool "Universal Flash Storage BSG device node"

	depends on SCSI_UFSHCD

	depends on (SCSI_UFSHCD || SCSI_UFSHCD_QTI)

	select BLK_DEV_BSGLIB

	help

	  Universal Flash Storage (UFS) is SCSI transport specification for

drivers/scsi/ufs/ufs-qcom.c

+600 −80

File changed.

Preview size limit exceeded, changes collapsed.

drivers/scsi/ufs/ufs-qcom.h

+103 −4
Original line number Diff line number Diff line
@@ -6,10 +6,16 @@ 
#define UFS_QCOM_H_



#include <linux/reset-controller.h>

#include <linux/phy/phy.h>

#include "ufshcd.h"

#ifdef CONFIG_SCSI_UFSHCD_QTI

#include "unipro.h"

#endif



#define MAX_UFS_QCOM_HOSTS	1

#define MAX_UFS_QCOM_HOSTS	2

#define MAX_U32                 (~(u32)0)

#define MPHY_TX_FSM_STATE       0x41

#define MPHY_RX_FSM_STATE       0xC1

#define TX_FSM_HIBERN8          0x1

#define HBRN8_POLL_TOUT_MS      100

#define DEFAULT_CLK_RATE_HZ     1000000
@@ -28,10 +34,17 @@ 


#define UFS_QCOM_LIMIT_NUM_LANES_RX	2

#define UFS_QCOM_LIMIT_NUM_LANES_TX	2

#define UFS_QCOM_LIMIT_HSGEAR_RX	UFS_HS_G3

#define UFS_QCOM_LIMIT_HSGEAR_TX	UFS_HS_G3

#ifdef CONFIG_SCSI_UFSHCD_QTI

#define UFS_QCOM_LIMIT_HSGEAR_RX	UFS_HS_G4

#define UFS_QCOM_LIMIT_HSGEAR_TX	UFS_HS_G4

#define UFS_QCOM_LIMIT_PWMGEAR_RX	UFS_PWM_G4

#define UFS_QCOM_LIMIT_PWMGEAR_TX	UFS_PWM_G4

#else

#define UFS_QCOM_LIMIT_HSGEAR_RX	UFS_HS_G3

#define UFS_QCOM_LIMIT_HSGEAR_TX	UFS_HS_G3

#define UFS_QCOM_LIMIT_PWMGEAR_RX	UFS_PWM_G3

#define UFS_QCOM_LIMIT_PWMGEAR_TX	UFS_PWM_G3

#endif

#define UFS_QCOM_LIMIT_RX_PWR_PWM	SLOW_MODE

#define UFS_QCOM_LIMIT_TX_PWR_PWM	SLOW_MODE

#define UFS_QCOM_LIMIT_RX_PWR_HS	FAST_MODE
@@ -109,6 +122,17 @@ enum { 
				 DFC_HW_CGC_EN | TRLUT_HW_CGC_EN |\

				 TMRLUT_HW_CGC_EN | OCSC_HW_CGC_EN)



/* bit definitions for UFS_AH8_CFG register */

#define CC_UFS_HCLK_REQ_EN		BIT(1)

#define CC_UFS_SYS_CLK_REQ_EN		BIT(2)

#define CC_UFS_ICE_CORE_CLK_REQ_EN	BIT(3)

#define CC_UFS_UNIPRO_CORE_CLK_REQ_EN	BIT(4)

#define CC_UFS_AUXCLK_REQ_EN		BIT(5)



#define UFS_HW_CLK_CTRL_EN	(CC_UFS_SYS_CLK_REQ_EN |\

				 CC_UFS_ICE_CORE_CLK_REQ_EN |\

				 CC_UFS_UNIPRO_CORE_CLK_REQ_EN |\

				 CC_UFS_AUXCLK_REQ_EN)

/* bit offset */

enum {

	OFFSET_UFS_PHY_SOFT_RESET           = 1,
@@ -122,6 +146,11 @@ enum { 
	MASK_CLK_NS_REG                     = 0xFFFC00,

};



enum ufs_qcom_phy_init_type {

	UFS_PHY_INIT_FULL,

	UFS_PHY_INIT_CFG_RESTORE,

};



/* QCOM UFS debug print bit mask */

#define UFS_QCOM_DBG_PRINT_REGS_EN	BIT(0)

#define UFS_QCOM_DBG_PRINT_ICE_REGS_EN	BIT(1)
@@ -133,17 +162,31 @@ enum { 


/* QUniPro Vendor specific attributes */

#define PA_VS_CONFIG_REG1	0x9000

#define SAVECONFIGTIME_MODE_MASK	0x6000

#define DME_VS_CORE_CLK_CTRL	0xD002

/* bit and mask definitions for DME_VS_CORE_CLK_CTRL attribute */

#define DME_VS_CORE_CLK_CTRL_CORE_CLK_DIV_EN_BIT		BIT(8)

#define DME_VS_CORE_CLK_CTRL_MAX_CORE_CLK_1US_CYCLES_MASK	0xFF



#define PA_VS_CLK_CFG_REG	0x9004

#define PA_VS_CLK_CFG_REG_MASK	0x1FF

#define DME_VS_CORE_CLK_CTRL_MAX_CORE_CLK_1US_CYCLES_MASK_V4	0xFFF

#define DME_VS_CORE_CLK_CTRL_MAX_CORE_CLK_1US_CYCLES_OFFSET_V4	0x10



#define PA_VS_CORE_CLK_40NS_CYCLES	0x9007

#define PA_VS_CORE_CLK_40NS_CYCLES_MASK	0xF



#define DL_VS_CLK_CFG		0xA00B

#define DL_VS_CLK_CFG_MASK	0x3FF



#define DME_VS_CORE_CLK_CTRL	0xD002

/* bit and mask definitions for DME_VS_CORE_CLK_CTRL attribute */

#define DME_VS_CORE_CLK_CTRL_MAX_CORE_CLK_1US_CYCLES_MASK_V4	0xFFF

#define DME_VS_CORE_CLK_CTRL_MAX_CORE_CLK_1US_CYCLES_OFFSET_V4	0x10

#define DME_VS_CORE_CLK_CTRL_MAX_CORE_CLK_1US_CYCLES_MASK	0xFF

#define DME_VS_CORE_CLK_CTRL_CORE_CLK_DIV_EN_BIT		BIT(8)

#define DME_VS_CORE_CLK_CTRL_DME_HW_CGC_EN			BIT(9)



static inline void

ufs_qcom_get_controller_revision(struct ufs_hba *hba,

				 u8 *major, u16 *minor, u16 *step)
@@ -236,6 +279,18 @@ struct ufs_qcom_host { 
	 * configuration even after UFS controller core power collapse.

	 */

	#define UFS_QCOM_CAP_RETAIN_SEC_CFG_AFTER_PWR_COLLAPSE	0x2



	/*

	 * Set this capability if host controller supports Qunipro internal

	 * clock gating.

	 */

	#define UFS_QCOM_CAP_QUNIPRO_CLK_GATING		0x4



	/*

	 * Set this capability if host controller supports SVS2 frequencies.

	 */

	#define UFS_QCOM_CAP_SVS2	0x8



	u32 caps;



	struct phy *generic_phy;
@@ -251,7 +306,6 @@ struct ufs_qcom_host { 
	void __iomem *dev_ref_clk_ctrl_mmio;

	bool is_dev_ref_clk_enabled;

	struct ufs_hw_version hw_ver;



	u32 dev_ref_clk_en_mask;



	/* Bitmask for enabling debug prints */
@@ -266,8 +320,14 @@ struct ufs_qcom_host { 
	int limit_rx_hs_gear;

	int limit_tx_pwm_gear;

	int limit_rx_pwm_gear;

	int limit_rate;



	bool disable_lpm;

	struct qcom_bus_scale_data *qbsd;

	struct ufs_vreg *vddp_ref_clk;

	struct ufs_vreg *vccq_parent;

	bool work_pending;

	bool is_phy_pwr_on;

};



static inline u32
@@ -284,6 +344,9 @@ ufs_qcom_get_debug_reg_offset(struct ufs_qcom_host *host, u32 reg) 
#define ufs_qcom_is_link_hibern8(hba) ufshcd_is_link_hibern8(hba)



int ufs_qcom_testbus_config(struct ufs_qcom_host *host);

void ufs_qcom_print_hw_debug_reg_all(struct ufs_hba *hba, void *priv,

		void (*print_fn)(struct ufs_hba *hba, int offset, int num_regs,

				const char *str, void *priv));



static inline bool ufs_qcom_cap_qunipro(struct ufs_qcom_host *host)

{
@@ -293,4 +356,40 @@ static inline bool ufs_qcom_cap_qunipro(struct ufs_qcom_host *host) 
		return false;

}



static inline bool ufs_qcom_cap_qunipro_clk_gating(struct ufs_qcom_host *host)

{

	return !!(host->caps & UFS_QCOM_CAP_QUNIPRO_CLK_GATING);

}



static inline bool ufs_qcom_cap_svs2(struct ufs_qcom_host *host)

{

	return !!(host->caps & UFS_QCOM_CAP_SVS2);

}



/**

 * ufshcd_dme_rmw - get modify set a dme attribute

 * @hba - per adapter instance

 * @mask - mask to apply on read value

 * @val - actual value to write

 * @attr - dme attribute

 */

static inline int ufshcd_dme_rmw(struct ufs_hba *hba, u32 mask,

				 u32 val, u32 attr)

{

	u32 cfg = 0;

	int err = 0;



	err = ufshcd_dme_get(hba, UIC_ARG_MIB(attr), &cfg);

	if (err)

		goto out;



	cfg &= ~mask;

	cfg |= (val & mask);



	err = ufshcd_dme_set(hba, UIC_ARG_MIB(attr), cfg);



out:

	return err;

}



#endif /* UFS_QCOM_H_ */

drivers/scsi/ufs/unipro.h

+3 −0
Original line number Diff line number Diff line
@@ -192,6 +192,9 @@ enum ufs_hs_gear_tag { 
	UFS_HS_G1,		/* HS Gear 1 (default for reset) */

	UFS_HS_G2,		/* HS Gear 2 */

	UFS_HS_G3,		/* HS Gear 3 */

#ifdef CONFIG_SCSI_UFSHCD_QTI

	UFS_HS_G4,		/* HS Gear 4 */

#endif

};



enum ufs_unipro_ver {