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Commit 2566f106 authored by Yunsheng Lin's avatar Yunsheng Lin Committed by David S. Miller
Browse files

net: hns3: fix for vport->bw_limit overflow problem 



When setting vport->bw_limit to hdev->tm_info.pg_info[0].bw_limit
in hclge_tm_vport_tc_info_update, vport->bw_limit can be as big as
HCLGE_ETHER_MAX_RATE (100000), which can not fit into u16 (65535).

So this patch fixes it by using u32 for vport->bw_limit.

Fixes: 84844054 ("net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver")
Reported-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: default avatarYunsheng Lin <linyunsheng@huawei.com>
Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8a9a654b

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

+1 −1
Original line number Diff line number Diff line
@@ -854,7 +854,7 @@ struct hclge_vport { 
	u16 alloc_rss_size;



	u16 qs_offset;

	u16 bw_limit;		/* VSI BW Limit (0 = disabled) */

	u32 bw_limit;		/* VSI BW Limit (0 = disabled) */

	u8  dwrr;



	struct hclge_port_base_vlan_config port_base_vlan_cfg;