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Commit 25400036 authored by Ben Dooks's avatar Ben Dooks Committed by Ben Dooks
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ARM: S3C2412: Update memory register mapping and definitions 



Update the mapping of the memory controler registers and
add the missing definitions of the register block for the
SSMC.

The register contents definitions can be found in the pl093
header.

Signed-off-by: default avatarBen Dooks <ben@simtec.co.uk>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent e13cf03e

arch/arm/mach-s3c2410/include/mach/map.h

+7 −0
Original line number Original line Diff line number Diff line
@@ -67,6 +67,13 @@ 
#define S3C2443_PA_HSMMC   (0x4A800000)

#define S3C2443_PA_HSMMC   (0x4A800000)

#define S3C2443_SZ_HSMMC   (256)

#define S3C2443_SZ_HSMMC   (256)





/* S3C2412 memory and IO controls */

#define S3C2412_PA_SSMC	(0x4F000000)

#define S3C2412_VA_SSMC	S3C_ADDR_CPU(0x00000000)



#define S3C2412_PA_EBI	(0x48800000)

#define S3C2412_VA_EBI	S3C_ADDR_CPU(0x00010000)



/* physical addresses of all the chip-select areas */

/* physical addresses of all the chip-select areas */





#define S3C2410_CS0 (0x00000000)

#define S3C2410_CS0 (0x00000000)

arch/arm/mach-s3c2410/include/mach/regs-s3c2412-mem.h

+21 −2
Original line number Original line Diff line number Diff line
@@ -14,9 +14,11 @@ 
#ifndef __ASM_ARM_REGS_S3C2412_MEM

#ifndef __ASM_ARM_REGS_S3C2412_MEM

#define __ASM_ARM_REGS_S3C2412_MEM

#define __ASM_ARM_REGS_S3C2412_MEM





#ifndef S3C2412_MEMREG

#define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))

#define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x))

#endif

#define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x))



#define S3C2412_SSMCREG(x) (S3C2412_VA_SSMC + (x))

#define S3C2412_SSMC(x, o) (S3C2412_SSMCREG((x * 0x20) + (o)))





#define S3C2412_BANKCFG			S3C2412_MEMREG(0x00)

#define S3C2412_BANKCFG			S3C2412_MEMREG(0x00)

#define S3C2412_BANKCON1		S3C2412_MEMREG(0x04)

#define S3C2412_BANKCON1		S3C2412_MEMREG(0x04)
@@ -26,4 +28,21 @@ 
#define S3C2412_REFRESH			S3C2412_MEMREG(0x10)

#define S3C2412_REFRESH			S3C2412_MEMREG(0x10)

#define S3C2412_TIMEOUT			S3C2412_MEMREG(0x14)

#define S3C2412_TIMEOUT			S3C2412_MEMREG(0x14)





/* EBI control registers */



#define S3C2412_EBI_PR			S3C2412_EBIREG(0x00)

#define S3C2412_EBI_BANKCFG		S3C2412_EBIREG(0x04)



/* SSMC control registers */



#define S3C2412_SSMC_BANK(x)		S3C2412_SSMC(x, 0x00)

#define S3C2412_SMIDCYR(x)		S3C2412_SSMC(x, 0x00)

#define S3C2412_SMBWSTRD(x)		S3C2412_SSMC(x, 0x04)

#define S3C2412_SMBWSTWRR(x)		S3C2412_SSMC(x, 0x08)

#define S3C2412_SMBWSTOENR(x)		S3C2412_SSMC(x, 0x0C)

#define S3C2412_SMBWSTWENR(x)		S3C2412_SSMC(x, 0x10)

#define S3C2412_SMBCR(x)		S3C2412_SSMC(x, 0x14)

#define S3C2412_SMBSR(x)		S3C2412_SSMC(x, 0x18)

#define S3C2412_SMBWSTBRDR(x)		S3C2412_SSMC(x, 0x1C)



#endif /*  __ASM_ARM_REGS_S3C2412_MEM */
 
#endif /*  __ASM_ARM_REGS_S3C2412_MEM */

arch/arm/mach-s3c2412/s3c2412.c

+12 −0
Original line number Original line Diff line number Diff line
@@ -69,6 +69,18 @@ static struct map_desc s3c2412_iodesc[] __initdata = { 
	IODESC_ENT(CLKPWR),

	IODESC_ENT(CLKPWR),

	IODESC_ENT(TIMER),

	IODESC_ENT(TIMER),

	IODESC_ENT(WATCHDOG),

	IODESC_ENT(WATCHDOG),

	{

		.virtual = (unsigned long)S3C2412_VA_SSMC,

		.pfn	 = __phys_to_pfn(S3C2412_PA_SSMC),

		.length	 = SZ_1M,

		.type	 = MT_DEVICE,

	},

	{

		.virtual = (unsigned long)S3C2412_VA_EBI,

		.pfn	 = __phys_to_pfn(S3C2412_PA_EBI),

		.length	 = SZ_1M,

		.type	 = MT_DEVICE,

	},

};

};





/* uart registration process */

/* uart registration process */