Merge "ARM: dts: msm: Enable SMMU bypass mode for stage 1 of UFS"

		 reset-gpios = <&tlmm 204 GPIO_ACTIVE_LOW>;

		 resets = <&gcc GCC_UFS_PHY_BCR>;

		 reset-names = "rst";

		 iommus = <&apps_smmu 0x80 0x0>;

		 qcom,iommu-dma = "bypass";

		 dma-coherent;

		 status = "disabled";

	};