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Commit 1b922423 authored by Xiangliang Yu's avatar Xiangliang Yu Committed by Alex Deucher
Browse files

drm/amdgpu: impl sriov detection for vega10



Read vega10 hw register to detect if sriov is enabled, and call
it before IP blocks setting.

Signed-off-by: default avatarXiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarMonk Liu <Monk.Liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3fc08b61
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+18 −0
Original line number Diff line number Diff line
@@ -231,3 +231,21 @@ int nbio_v6_1_init(struct amdgpu_device *adev)

	return 0;
}

void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev)
{
	uint32_t reg;

	reg = RREG32(SOC15_REG_OFFSET(NBIO, 0,
				      mmRCC_PF_0_0_RCC_IOV_FUNC_IDENTIFIER));
	if (reg & 1)
		adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF;

	if (reg & 0x80000000)
		adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV;

	if (!reg) {
		if (is_virtual_machine())	/* passthrough mode exclus sriov mod */
			adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE;
	}
}
+1 −0
Original line number Diff line number Diff line
@@ -48,5 +48,6 @@ void nbio_v6_1_ih_control(struct amdgpu_device *adev);
u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev);
void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable);
void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable);
void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev);

#endif
+2 −0
Original line number Diff line number Diff line
@@ -469,6 +469,8 @@ static const struct amdgpu_ip_block_version vega10_common_ip_block =

int soc15_set_ip_blocks(struct amdgpu_device *adev)
{
	nbio_v6_1_detect_hw_virt(adev);

	switch (adev->asic_type) {
	case CHIP_VEGA10:
		amdgpu_ip_block_add(adev, &vega10_common_ip_block);