pci: msm: Read clkreq override bit irrespective of rpmsg_send status

There is a possibility of race where drv enable flag is cleared and
DRV entered into L1SS sleep and went into SSR. This would cause the
clkreq override check to get skipped which would skip the L1SS exit
sequence and cause the link down when link is requested to perform
gen switch. Fix the issue by always reading the clkreq override bit
upon DRV resume.

Change-Id: I0f992875c8f54cba6b79c1484e55c441d0f08fb4
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>