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Commit 15560657 authored by Kristina Martsenko's avatar Kristina Martsenko Committed by Will Deacon
Browse files

arm64: add comments about EC exception levels 



To make it clear which exceptions can't be taken to EL1 or EL2, add
comments next to the ESR_ELx_EC_* macro definitions.

Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarKristina Martsenko <kristina.martsenko@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 26a25c84

arch/arm64/include/asm/esr.h

+7 −7
Original line number Diff line number Diff line
@@ -29,23 +29,23 @@ 
#define ESR_ELx_EC_CP14_MR	(0x05)

#define ESR_ELx_EC_CP14_LS	(0x06)

#define ESR_ELx_EC_FP_ASIMD	(0x07)

#define ESR_ELx_EC_CP10_ID	(0x08)

#define ESR_ELx_EC_CP10_ID	(0x08)	/* EL2 only */

/* Unallocated EC: 0x09 - 0x0B */

#define ESR_ELx_EC_CP14_64	(0x0C)

/* Unallocated EC: 0x0d */

#define ESR_ELx_EC_ILL		(0x0E)

/* Unallocated EC: 0x0F - 0x10 */

#define ESR_ELx_EC_SVC32	(0x11)

#define ESR_ELx_EC_HVC32	(0x12)

#define ESR_ELx_EC_SMC32	(0x13)

#define ESR_ELx_EC_HVC32	(0x12)	/* EL2 only */

#define ESR_ELx_EC_SMC32	(0x13)	/* EL2 and above */

/* Unallocated EC: 0x14 */

#define ESR_ELx_EC_SVC64	(0x15)

#define ESR_ELx_EC_HVC64	(0x16)

#define ESR_ELx_EC_SMC64	(0x17)

#define ESR_ELx_EC_HVC64	(0x16)	/* EL2 and above */

#define ESR_ELx_EC_SMC64	(0x17)	/* EL2 and above */

#define ESR_ELx_EC_SYS64	(0x18)

#define ESR_ELx_EC_SVE		(0x19)

/* Unallocated EC: 0x1A - 0x1E */

#define ESR_ELx_EC_IMP_DEF	(0x1f)

#define ESR_ELx_EC_IMP_DEF	(0x1f)	/* EL3 only */

#define ESR_ELx_EC_IABT_LOW	(0x20)

#define ESR_ELx_EC_IABT_CUR	(0x21)

#define ESR_ELx_EC_PC_ALIGN	(0x22)
@@ -68,7 +68,7 @@ 
/* Unallocated EC: 0x36 - 0x37 */

#define ESR_ELx_EC_BKPT32	(0x38)

/* Unallocated EC: 0x39 */

#define ESR_ELx_EC_VECTOR32	(0x3A)

#define ESR_ELx_EC_VECTOR32	(0x3A)	/* EL2 only */

/* Unallocted EC: 0x3B */

#define ESR_ELx_EC_BRK64	(0x3C)

/* Unallocated EC: 0x3D - 0x3F */