Commit 26a25c84 authored Dec 13, 2018 by Will Deacon

arm64: perf: Treat EXCLUDE_EL* bit definitions as unsigned



Although the upper 32 bits of the PMEVTYPER<n>_EL0 registers are RES0,
we should treat the EXCLUDE_EL* bit definitions as unsigned so that we
avoid accidentally sign-extending the privilege filtering bit (bit 31)
into the upper half of the register.

Signed-off-by: Will Deacon <will.deacon@arm.com>

parent 2a355ec2

arch/arm64/include/asm/perf_event.h

+3 −3

Original line number	Diff line number	Diff line
		@@ -206,9 +206,9 @@
		/*
		* Event filters for PMUv3
		*/
		#define ARMV8_PMU_EXCLUDE_EL1 (1 << 31)
		#define ARMV8_PMU_EXCLUDE_EL0 (1 << 30)
		#define ARMV8_PMU_INCLUDE_EL2 (1 << 27)
		#define ARMV8_PMU_EXCLUDE_EL1 (1U << 31)
		#define ARMV8_PMU_EXCLUDE_EL0 (1U << 30)
		#define ARMV8_PMU_INCLUDE_EL2 (1U << 27)

		/*
		* PMUSERENR: user enable reg