Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit 148edd50 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'meson-clk-4.20-1' of https://github.com/BayLibre/clk-meson into clk-meson

Pull meson clk driver updates from Jerome Brunet:

 - clk-pll driver improvements and updates
 - add axg audio controller system clocks
 - drop mpll3 from the possible pcie clock parent of the axg
 - register meson8b clock controller early

* tag 'meson-clk-4.20-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: meson8b: use the regmap in the internal reset controller
  clk: meson: meson8b: register the clock controller early
  clk: meson-axg: pcie: drop the mpll3 clock parent
  clk: meson: axg: round audio system master clocks down
  clk: meson: clk-pll: drop hard-coded rates from pll tables
  clk: meson: clk-pll: remove od parameters
  clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary
  clk: meson: clk-pll: add enable bit
parents 5b394b2d 93c873d6
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment