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Commit 13efd80a authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

ARM: dts: exynos: Add GPU/Mali 400 node to Exynos4 



Add nodes for GPU (Mali 400) to Exynos4210 and Exynos4412.  Describe the
GPU as much as possible however still few elements are missing:
1. Exynos4210 bus clock is not described in hardware manual therefore
   the IP gate clock was provided,
2. Exynos4412: Not sure what to do with CLK_G3D clock responsible for
   gating entire IP block (it is now being disabled as unused),
3. Regulator supplies on Trats board.

Limited testing on Odroid U3 (Exynos4412).

Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 4a7bc07f

arch/arm/boot/dts/exynos4.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -51,6 +51,42 @@ 
		serial3 = &serial_3;

	};



	gpu: gpu@13000000 {

		compatible = "samsung,exynos4210-mali", "arm,mali-400";

		reg = <0x13000000 0x10000>;

		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "gp",

				  "gpmmu",

				  "pp0",

				  "ppmmu0",

				  "pp1",

				  "ppmmu1",

				  "pp2",

				  "ppmmu2",

				  "pp3",

				  "ppmmu3",

				  "pmu";

		/*

		 * CLK_G3D is not actually bus clock but a IP-level clock.

		 * The bus clock is not described in hardware manual.

		 */

		clocks = <&clock CLK_G3D>,

			 <&clock CLK_SCLK_G3D>;

		clock-names = "bus", "core";

		power-domains = <&pd_g3d>;

		status = "disabled";

	};



	pmu: pmu {

		compatible = "arm,cortex-a9-pmu";

		interrupt-parent = <&combiner>;

arch/arm/boot/dts/exynos4210-origen.dts

+5 −0
Original line number Diff line number Diff line
@@ -132,6 +132,11 @@ 
	status = "okay";

};



&gpu {

	mali-supply = <&buck3_reg>;

	status = "okay";

};



&hsotg {

	vusb_d-supply = <&ldo3_reg>;

	vusb_a-supply = <&ldo8_reg>;

arch/arm/boot/dts/exynos4210-trats.dts

+4 −0
Original line number Diff line number Diff line
@@ -239,6 +239,10 @@ 
	status = "okay";

};



&gpu {

	status = "okay";

};



&hsotg {

	vusb_d-supply = <&vusb_reg>;

	vusb_a-supply = <&vusbdac_reg>;

arch/arm/boot/dts/exynos4210-universal_c210.dts

+5 −0
Original line number Diff line number Diff line
@@ -262,6 +262,11 @@ 
	};

};



&gpu {

	mali-supply = <&buck2_reg>;

	status = "okay";

};



&hdmi {

	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;

	pinctrl-names = "default";

arch/arm/boot/dts/exynos4210.dtsi

+17 −0
Original line number Diff line number Diff line
@@ -449,6 +449,23 @@ 
	samsung,lcd-wb;

};



&gpu {

	operating-points-v2 = <&gpu_opp_table>;



	gpu_opp_table: opp_table {

		compatible = "operating-points-v2";



		opp-160000000 {

			opp-hz = /bits/ 64 <160000000>;

			opp-microvolt = <950000>;

		};

		opp-267000000 {

			opp-hz = /bits/ 64 <267000000>;

			opp-microvolt = <1050000>;

		};

	};

};



&mdma1 {

	power-domains = <&pd_lcd0>;

};