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Commit 0fd0c21b authored by Paul Walmsley's avatar Paul Walmsley
Browse files

OMAP2: clock: add DPLL autoidle support 



Add the necessary code and data to allow the clock framework to enable
and disable the OMAP2 DPLL autoidle state.  This is so the direct
register access can be moved out of the mach-omap2/pm24xx.c code, and other
code that needs to control this (e.g., CPUIdle) can do so via an API.
As part of this patch, remove the pm24xx.c code that formerly wrote
directly to the autoidle bits.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Tested-by: default avatarRajendra Nayak <rnayak@ti.com>
Reviewed-by: default avatarKevin Hilman <khilman@ti.com>
parent c6461f5c

arch/arm/mach-omap2/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -115,7 +115,8 @@ obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o \ 
					   clkt2xxx_sys.o \

					   clkt2xxx_dpllcore.o \

					   clkt2xxx_virt_prcm_set.o \

					   clkt2xxx_apll.o clkt2xxx_osc.o

					   clkt2xxx_apll.o clkt2xxx_osc.o \

					   clkt2xxx_dpll.o

obj-$(CONFIG_SOC_OMAP2420)		+= clock2420_data.o

obj-$(CONFIG_SOC_OMAP2430)		+= clock2430.o clock2430_data.o

obj-$(CONFIG_ARCH_OMAP3)		+= $(clock-common) clock3xxx.o \

arch/arm/mach-omap2/clkt2xxx_dpll.c

0 → 100644
+63 −0
Original line number Diff line number Diff line 
/*

 * OMAP2-specific DPLL control functions

 *

 * Copyright (C) 2011 Nokia Corporation

 * Paul Walmsley

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <linux/kernel.h>

#include <linux/errno.h>

#include <linux/clk.h>

#include <linux/io.h>



#include <plat/clock.h>



#include "clock.h"

#include "cm2xxx_3xxx.h"

#include "cm-regbits-24xx.h"



/* Private functions */



/**

 * _allow_idle - enable DPLL autoidle bits

 * @clk: struct clk * of the DPLL to operate on

 *

 * Enable DPLL automatic idle control.  The DPLL will enter low-power

 * stop when its downstream clocks are gated.  No return value.

 * REVISIT: DPLL can optionally enter low-power bypass by writing 0x1

 * instead.  Add some mechanism to optionally enter this mode.

 */

static void _allow_idle(struct clk *clk)

{

	if (!clk || !clk->dpll_data)

		return;



	omap2xxx_cm_set_dpll_auto_low_power_stop();

}



/**

 * _deny_idle - prevent DPLL from automatically idling

 * @clk: struct clk * of the DPLL to operate on

 *

 * Disable DPLL automatic idle control.  No return value.

 */

static void _deny_idle(struct clk *clk)

{

	if (!clk || !clk->dpll_data)

		return;



	omap2xxx_cm_set_dpll_disable_autoidle();

}





/* Public data */



const struct clkops clkops_omap2xxx_dpll_ops = {

	.allow_idle	= _allow_idle,

	.deny_idle	= _deny_idle,

};

arch/arm/mach-omap2/clock.h

+1 −0
Original line number Diff line number Diff line
@@ -148,6 +148,7 @@ extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) 
#define omap2_clk_exit_cpufreq_table	0

#endif



extern const struct clkops clkops_omap2xxx_dpll_ops;

extern const struct clkops clkops_omap3_noncore_dpll_ops;

extern const struct clkops clkops_omap3_core_dpll_ops;

extern const struct clkops clkops_omap4_dpllmx_ops;

arch/arm/mach-omap2/clock2420_data.c

+1 −1
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ static struct dpll_data dpll_dd = { 
 */

static struct clk dpll_ck = {

	.name		= "dpll_ck",

	.ops		= &clkops_null,

	.ops		= &clkops_omap2xxx_dpll_ops,

	.parent		= &sys_ck,		/* Can be func_32k also */

	.dpll_data	= &dpll_dd,

	.clkdm_name	= "wkup_clkdm",

arch/arm/mach-omap2/clock2430_data.c

+1 −1
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ static struct dpll_data dpll_dd = { 
 */

static struct clk dpll_ck = {

	.name		= "dpll_ck",

	.ops		= &clkops_null,

	.ops		= &clkops_omap2xxx_dpll_ops,

	.parent		= &sys_ck,		/* Can be func_32k also */

	.dpll_data	= &dpll_dd,

	.clkdm_name	= "wkup_clkdm",