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Commit 09253fcc authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'imx-dt-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt 

i.MX arm32 DT changes for 5.3:
 - New board support: iMX6-based Kontron SMARC-sAMX6i, i.MX7D based
   Meerkat96 board, and NXP LS1021A-TSN board.
 - A series from Andrey Smirnov to update vf610-zii-dev and
   imx7d-zii-rpu2 board, fixing UART2 pin assignment and stdout-path,
   adding QSPI device, and dropping unused pinmux.
 - Update imx6sl and imx6qdl device tree to assign corresponding clocks
   instead of dummy clock.
 - Update i.MX6/7 boards from NXP to assign corresponding power supply
   for LDOs.
 - Update i.MX6/7 device trees to enable SNVS poweroff key support
   according to board design.
 - Update coresight DT binding for i.MX7 according to consolidations
   for CoreSight replicator and funnel.
 - A series from Marek Vasut to update M53Menlo board on various devices
   like UART, USB, ethernet PHY, GPIOs etc.
 - Enable USBOTG support for imx7ulp and evk board.
 - A series from Peter Robinson to update imx6sx-udoo board, switching
   to SPDX License Identifier, enabling I2C devices and bluetooth
   support.
 - Add video capture support for i.MX53 and imx53-smd board.
 - Add PXP device for i.MX6UL.
 - Other random small updates on various boards.

* tag 'imx-dt-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux

: (46 commits)
  ARM: dts: imx7ulp-evk: enable USBOTG1 support
  ARM: dts: imx7ulp: add imx7ulp USBOTG1 support
  ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support
  ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module
  ARM: dts: imx7d-zii-rpu2: Drop unused pinmux entries
  ARM: dts: imx7d-zii-rpu2: Fix incorrrect 'stdout-path'
  ARM: dts: Add support for 96Boards Meerkat96 board
  ARM: dts: imx6ul: Add PXP node
  ARM: dts: imx6sll: Enable SNVS poweroff according to board design
  ARM: dts: imx7s: Enable SNVS power key according to board design
  ARM: dts: imx6sll: Enable SNVS power key according to board design
  ARM: dts: imx6ul: Enable SNVS power key according to board design
  ARM: dts: imx6sx: Enable SNVS power key according to board design
  ARM: dts: imx6qdl: Enable SNVS power key according to board design
  ARM: dts: imx53: Bind CPLD on M53Menlo
  ARM: dts: Introduce the NXP LS1021A-TSN board
  ARM: dts: imx6ull-colibri: enable UHS-I for USDHC1
  ARM: dts: imx7d: Update cpufreq OPP table
  ARM: dts: imx6sx-udoo-neo: add bluetooth config to uart3
  ARM: dts: imx6sx-udoo-neo: enable i2c-2 and i2c-4 for onboard sensors
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 9bb03d26 48cbd9ff

arch/arm/boot/dts/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -586,6 +586,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \ 
	imx7d-colibri-emmc-eval-v3.dtb \

	imx7d-colibri-eval-v3.dtb \

	imx7d-mba7.dtb \

	imx7d-meerkat96.dtb \

	imx7d-nitrogen7.dtb \

	imx7d-pico-hobbit.dtb \

	imx7d-pico-pi.dtb \
@@ -602,6 +603,7 @@ dtb-$(CONFIG_SOC_IMX7ULP) += \ 
dtb-$(CONFIG_SOC_LS1021A) += \

	ls1021a-moxa-uc-8410a.dtb \

	ls1021a-qds.dtb \

	ls1021a-tsn.dtb \

	ls1021a-twr.dtb

dtb-$(CONFIG_SOC_VF610) += \

	vf500-colibri-eval-v3.dtb \

arch/arm/boot/dts/imx53-m53menlo.dts

+223 −43
Original line number Diff line number Diff line
@@ -10,6 +10,25 @@ 
	model = "MENLO M53 EMBEDDED DEVICE";

	compatible = "menlo,m53menlo", "fsl,imx53";



	gpio-keys {

		compatible = "gpio-keys";

		pinctrl-0 = <&pinctrl_power_button>;

		pinctrl-names = "default";



		power-button {

			label = "Power button";

			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_POWER>;

		};

	};



	gpio-poweroff {

		compatible = "gpio-poweroff";

		pinctrl-0 = <&pinctrl_power_out>;

		pinctrl-names = "default";

		gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;

	};



	leds {

		compatible = "gpio-leds";

		pinctrl-names = "default";
@@ -30,7 +49,7 @@ 
		eth {

			label = "EthLedYe";

			gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;

			linux,default-trigger = "none";

			linux,default-trigger = "netdev";

		};

	};
@@ -45,12 +64,19 @@ 
		};

	};



	beeper {

		compatible = "gpio-beeper";

		pinctrl-0 = <&pinctrl_beeper>;

		gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>;

	};



	reg_usbh1_vbus: regulator-usbh1-vbus {

		compatible = "regulator-fixed";

		regulator-name = "vbus";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

		gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;

		gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};

};
@@ -74,6 +100,25 @@ 
	assigned-clock-rates = <133333334>, <33333334>, <33333334>;

};



&ecspi2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_ecspi2>;

	cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>, <&gpio2 27 GPIO_ACTIVE_HIGH>;

	status = "okay";



	spidev@0 {

		compatible = "menlo,m53cpld";

		spi-max-frequency = <25000000>;

		reg = <0>;

	};



	spidev@1 {

		compatible = "menlo,m53cpld";

		spi-max-frequency = <25000000>;

		reg = <1>;

	};

};



&esdhc1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_esdhc1>;
@@ -86,9 +131,82 @@ 
	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_fec>;

	phy-mode = "rmii";

	phy-reset-gpios = <&gpio7 7 GPIO_ACTIVE_LOW>;

	status = "okay";

};



&gpio1 {

	gpio-line-names =

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "";

};



&gpio2 {

	gpio-line-names =

		"", "", "", "",

		"", "", "", "",

		"TestPin_SV2_3", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "";

};



&gpio3 {

	gpio-line-names =

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"CPLD_JTAG_TDI", "CPLD_JTAG_TMS", "", "",

		"", "CPLD_JTAG_TDO", "", "";

};



&gpio5 {

	gpio-line-names =

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "CPLD_JTAG_TCK", "KBD_intK",

		"CPLD_int", "CPLD_JTAG_internal", "CPLD_D[0]", "CPLD_D[1]",

		"CPLD_D[2]", "CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]",

		"CPLD_D[6]", "CPLD_D[7]", "DISP_reset", "KBD_intI";

};



&gpio6 {

	gpio-line-names =

		"", "", "", "",

		"CPLD_reset", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "";

};



&gpio7 {

	gpio-line-names =

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "USB-OTG_OverCurrent", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "",

		"", "", "", "";

};



&i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c1>;
@@ -136,27 +254,37 @@ 
	imx53-m53evk {

		hoggrp {

			fsl,pins = <

				MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	0x1c4

				MX53_PAD_EIM_EB3__GPIO2_31		0x1d5

				MX53_PAD_PATA_DA_0__GPIO7_6		0x1d5

				MX53_PAD_GPIO_19__CCM_CLKO		0x1d5

				MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK	0x1d5

				MX53_PAD_CSI0_DAT4__GPIO5_22		0x1d5

				MX53_PAD_CSI0_DAT5__GPIO5_23		0x1d5

				MX53_PAD_CSI0_DAT6__GPIO5_24		0x1d5

				MX53_PAD_CSI0_DAT7__GPIO5_25		0x1d5

				MX53_PAD_CSI0_DAT8__GPIO5_26		0x1d5

				MX53_PAD_CSI0_DAT9__GPIO5_27		0x1d5

				MX53_PAD_CSI0_DAT10__GPIO5_28		0x1d5

				MX53_PAD_CSI0_DAT11__GPIO5_29		0x1d5

				MX53_PAD_CSI0_DAT14__GPIO6_0		0x1d5

				MX53_PAD_GPIO_19__CCM_CLKO		0x1e4

				MX53_PAD_CSI0_DATA_EN__GPIO5_20		0x1e4

				MX53_PAD_CSI0_DAT4__GPIO5_22		0x1e4

				MX53_PAD_CSI0_DAT5__GPIO5_23		0x1c4

				MX53_PAD_CSI0_DAT6__GPIO5_24		0x1e4

				MX53_PAD_CSI0_DAT7__GPIO5_25		0x1e4

				MX53_PAD_CSI0_DAT8__GPIO5_26		0x1e4

				MX53_PAD_CSI0_DAT9__GPIO5_27		0x1c4

				MX53_PAD_CSI0_DAT10__GPIO5_28		0x1e4

				MX53_PAD_CSI0_DAT11__GPIO5_29		0x1e4

				MX53_PAD_PATA_DATA11__GPIO2_11		0x1e4

				MX53_PAD_EIM_D24__GPIO3_24		0x1e4

				MX53_PAD_EIM_D25__GPIO3_25		0x1e4

				MX53_PAD_EIM_D29__GPIO3_29		0x1e4

				MX53_PAD_CSI0_PIXCLK__GPIO5_18		0x1e4

				MX53_PAD_CSI0_VSYNC__GPIO5_21		0x1e4

				MX53_PAD_CSI0_DAT18__GPIO6_4		0x1c4

				MX53_PAD_PATA_DATA8__GPIO2_8		0x1e4

			>;

		};



		pinctrl_led: ledgrp {

			fsl,pins = <

				MX53_PAD_CSI0_DAT15__GPIO6_1		0x1d5

				MX53_PAD_CSI0_DAT16__GPIO6_2		0x1d5

				MX53_PAD_CSI0_DAT15__GPIO6_1		0x1c4

				MX53_PAD_CSI0_DAT16__GPIO6_2		0x1c4

			>;

		};



		pinctrl_beeper: beepergrp {

			fsl,pins = <

				MX53_PAD_CSI0_DAT17__GPIO6_3		0x1c4

			>;

		};
@@ -169,49 +297,66 @@ 


		pinctrl_can2: can2grp {

			fsl,pins = <

				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x1c4

				MX53_PAD_KEY_COL4__CAN2_TXCAN		0x1e4

				MX53_PAD_KEY_ROW4__CAN2_RXCAN		0x1c4

			>;

		};



		pinctrl_display_gpio: display-gpiogrp {

			fsl,pins = <

				MX53_PAD_CSI0_DAT12__GPIO5_30		0x1d5 /* Reset */

				MX53_PAD_CSI0_DAT13__GPIO5_31		0x1d5 /* Interrupt */

				MX53_PAD_CSI0_DAT12__GPIO5_30		0x1c4 /* Reset */

				MX53_PAD_CSI0_MCLK__GPIO5_19		0x1e4 /* Int-K */

				MX53_PAD_CSI0_DAT13__GPIO5_31		0x1c4 /* Int-I */



				MX53_PAD_CSI0_DAT14__GPIO6_0		0x1c4 /* Power down */

			>;

		};



		pinctrl_edt_ft5x06: edt-ft5x06grp {

			fsl,pins = <

				MX53_PAD_PATA_DATA9__GPIO2_9		0x1d5 /* Reset */

				MX53_PAD_CSI0_DAT19__GPIO6_5		0x1d5 /* Interrupt */

				MX53_PAD_PATA_DATA10__GPIO2_10		0x1d5 /* Wake */

				MX53_PAD_PATA_DATA9__GPIO2_9		0x1e4 /* Reset */

				MX53_PAD_CSI0_DAT19__GPIO6_5		0x1c4 /* Interrupt */

				MX53_PAD_PATA_DATA10__GPIO2_10		0x1e4 /* Wake */

			>;

		};



		pinctrl_ecspi2: ecspi2grp {

			fsl,pins = <

				MX53_PAD_EIM_CS0__ECSPI2_SCLK		0xe4

				MX53_PAD_EIM_OE__ECSPI2_MISO		0xe4

				MX53_PAD_EIM_CS1__ECSPI2_MOSI		0xe4

				MX53_PAD_EIM_RW__GPIO2_26		0xe4

				MX53_PAD_EIM_LBA__GPIO2_27		0xe4

			>;

		};



		pinctrl_esdhc1: esdhc1grp {

			fsl,pins = <

				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1d5

				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1d5

				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1d5

				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1d5

				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1d5

				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1d5

				MX53_PAD_SD1_DATA0__ESDHC1_DAT0		0x1e4

				MX53_PAD_SD1_DATA1__ESDHC1_DAT1		0x1e4

				MX53_PAD_SD1_DATA2__ESDHC1_DAT2		0x1e4

				MX53_PAD_SD1_DATA3__ESDHC1_DAT3		0x1e4

				MX53_PAD_SD1_CMD__ESDHC1_CMD		0x1e4

				MX53_PAD_SD1_CLK__ESDHC1_CLK		0x1e4

				MX53_PAD_GPIO_1__GPIO1_1		0x1c4

				MX53_PAD_GPIO_9__GPIO1_9		0x1e4

			>;

		};



		pinctrl_fec: fecgrp {

			fsl,pins = <

				MX53_PAD_FEC_MDC__FEC_MDC		0x4

				MX53_PAD_FEC_MDIO__FEC_MDIO		0x1fc

				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x180

				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x180

				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x180

				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x180

				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x180

				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x4

				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x4

				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x4

				MX53_PAD_FEC_MDC__FEC_MDC		0x1e4

				MX53_PAD_FEC_MDIO__FEC_MDIO		0x1e4

				MX53_PAD_FEC_REF_CLK__FEC_TX_CLK	0x1e4

				MX53_PAD_FEC_RX_ER__FEC_RX_ER		0x1e4

				MX53_PAD_FEC_CRS_DV__FEC_RX_DV		0x1e4

				MX53_PAD_FEC_RXD1__FEC_RDATA_1		0x1e4

				MX53_PAD_FEC_RXD0__FEC_RDATA_0		0x1e4

				MX53_PAD_FEC_TX_EN__FEC_TX_EN		0x1c4

				MX53_PAD_FEC_TXD1__FEC_TDATA_1		0x1e4

				MX53_PAD_FEC_TXD0__FEC_TDATA_0		0x1e4

				MX53_PAD_PATA_DA_1__GPIO7_7		0x1e4

				MX53_PAD_EIM_EB3__GPIO2_31		0x1e4

			>;

		};
@@ -240,10 +385,24 @@ 
			>;

		};



		pinctrl_power_button: powerbutgrp {

			fsl,pins = <

				MX53_PAD_SD2_DATA2__GPIO1_13		0x1e4

			>;

		};



		pinctrl_power_out: poweroutgrp {

			fsl,pins = <

				MX53_PAD_SD2_DATA0__GPIO1_15		0x1e4

			>;

		};



		pinctrl_uart1: uart1grp {

			fsl,pins = <

				MX53_PAD_PATA_DIOW__UART1_TXD_MUX	0x1e4

				MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4

				MX53_PAD_PATA_IORDY__UART1_RTS		0x1e4

				MX53_PAD_PATA_RESET_B__UART1_CTS	0x1e4

			>;

		};
@@ -251,13 +410,25 @@ 
			fsl,pins = <

				MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX	0x1e4

				MX53_PAD_PATA_DMARQ__UART2_TXD_MUX	0x1e4

				MX53_PAD_PATA_DIOR__UART2_RTS		0x1e4

				MX53_PAD_PATA_INTRQ__UART2_CTS		0x1e4

			>;

		};



		pinctrl_uart3: uart3grp {

			fsl,pins = <

				MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4

				MX53_PAD_PATA_CS_0__UART3_TXD_MUX	0x1e4

				MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4

			>;

		};



		pinctrl_usb: usbgrp {

			fsl,pins = <

				MX53_PAD_GPIO_2__GPIO1_2		0x1d5

				MX53_PAD_GPIO_3__USBOH3_USBH1_OC	0x1d5

				MX53_PAD_GPIO_2__GPIO1_2		0x1c4

				MX53_PAD_GPIO_3__USBOH3_USBH1_OC	0x1c4

				MX53_PAD_GPIO_4__GPIO1_4		0x1c4

				MX53_PAD_GPIO_18__GPIO7_13		0x1c4

			>;

		};

	};
@@ -287,12 +458,21 @@ 
&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

	uart-has-rtscts;

	status = "okay";

};



&uart2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart2>;

	uart-has-rtscts;

	status = "okay";

};



&uart3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart3>;

	linux,rs485-enabled-at-boot-time;

	status = "okay";

};
@@ -301,7 +481,7 @@ 
	pinctrl-0 = <&pinctrl_usb>;

	vbus-supply = <&reg_usbh1_vbus>;

	phy_type = "utmi";

	dr_mode = "peripheral";

	dr_mode = "host";

	status = "okay";

};

arch/arm/boot/dts/imx53-smd.dts

+73 −0
Original line number Diff line number Diff line
@@ -185,6 +185,31 @@ 
			>;

		};



		pinctrl_ipu_csi0: ipucsi0grp {

			fsl,pins = <

				MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12    0x1c4

				MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13    0x1c4

				MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14    0x1c4

				MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15    0x1c4

				MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16    0x1c4

				MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17    0x1c4

				MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18    0x1c4

				MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19    0x1c4

				MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1e4

				MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC   0x1e4

				MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC    0x1e4

				MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x1e4

			>;

		};



		pinctrl_ov5642: ov5642grp {

			fsl,pins = <

				MX53_PAD_NANDF_WP_B__GPIO6_9   0x1e4

				MX53_PAD_NANDF_RB0__GPIO6_10   0x1e4

				MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x1c4

			>;

		};



		pinctrl_uart1: uart1grp {

			fsl,pins = <

				MX53_PAD_CSI0_DAT10__UART1_TXD_MUX	0x1e4
@@ -256,11 +281,47 @@ 
	camera: ov5642@3c {

		compatible = "ovti,ov5642";

		reg = <0x3c>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_ov5642>;

		assigned-clocks = <&clks IMX5_CLK_SSI_EXT1_SEL>,

				  <&clks IMX5_CLK_SSI_EXT1_COM_SEL>;

		assigned-clock-parents = <&clks IMX5_CLK_PLL2_SW>,

					 <&clks IMX5_CLK_SSI_EXT1_PODF>;

		assigned-clock-rates = <0>, <24000000>;

		clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;

		clock-names = "xclk";

		DVDD-supply = <&ldo9_reg>;

		AVDD-supply = <&ldo7_reg>;

		reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>;

		powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>;



		port {

			ov5642_to_ipu_csi0: endpoint {

				remote-endpoint = <&ipu_csi0_from_parallel_sensor>;

				bus-width = <8>;

				hsync-active = <1>;

				vsync-active = <1>;

			};

		};

	};



	pmic: dialog@48 {

		compatible = "dlg,da9053", "dlg,da9052";

		reg = <0x48>;

		interrupt-parent = <&gpio7>;

		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;



		regulators {

			ldo7_reg: ldo7 {

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <3600000>;

			};



			ldo9_reg: ldo9 {

				regulator-min-microvolt = <1250000>;

				regulator-max-microvolt = <3650000>;

			};

		};

	};

};
@@ -271,3 +332,15 @@ 
	phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;

	status = "okay";

};



&ipu_csi0_from_parallel_sensor {

	remote-endpoint = <&ov5642_to_ipu_csi0>;

	data-shift = <12>; /* Lines 19:12 used */

	hsync-active = <1>;

	vsync-active = <1>;

};



&ipu_csi0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_ipu_csi0>;

};

arch/arm/boot/dts/imx53.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
		i2c0 = &i2c1;

		i2c1 = &i2c2;

		i2c2 = &i2c3;

		ipu0 = &ipu;

		mmc0 = &esdhc1;

		mmc1 = &esdhc2;

		mmc2 = &esdhc3;
@@ -71,6 +72,11 @@ 
		ports = <&ipu_di0>, <&ipu_di1>;

	};



	capture_subsystem {

		compatible = "fsl,imx-capture-subsystem";

		ports = <&ipu_csi0>, <&ipu_csi1>;

	};



	tzic: tz-interrupt-controller@fffc000 {

		compatible = "fsl,imx53-tzic", "fsl,tzic";

		interrupt-controller;
@@ -158,10 +164,16 @@ 


			ipu_csi0: port@0 {

				reg = <0>;



				ipu_csi0_from_parallel_sensor: endpoint {

				};

			};



			ipu_csi1: port@1 {

				reg = <1>;



				ipu_csi1_from_parallel_sensor: endpoint {

				};

			};



			ipu_di0: port@2 {

arch/arm/boot/dts/imx6dl-kontron-samx6i.dtsi

0 → 100644
+12 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0 OR X11

/*

 * Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de>

 */



#include "imx6dl.dtsi"

#include "imx6qdl-kontron-samx6i.dtsi"



/ {

	model = "Kontron SMARC sAMX6i Dual-Lite/Solo";

	compatible = "kontron,imx6dl-samx6i", "fsl,imx6dl";

};