Loading drivers/cam_cpas/cam_cpas_hw.c +1 −1 Original line number Diff line number Diff line Loading @@ -1204,7 +1204,7 @@ static int cam_cpas_util_apply_client_ahb_vote(struct cam_hw_info *cpas_hw, if (cpas_core->streamon_clients) { rc = cam_soc_util_set_clk_rate_level(&cpas_hw->soc_info, highest_level); highest_level, true); if (rc) { CAM_ERR(CAM_CPAS, "Failed in scaling clock rate level %d for AHB", Loading drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.c +1 −1 Original line number Diff line number Diff line Loading @@ -1339,7 +1339,7 @@ int32_t cam_csiphy_core_cfg(void *phy_dev, csiphy_dev->ctrl_reg->getclockvoting( csiphy_dev, offset); rc = cam_soc_util_set_clk_rate_level( &csiphy_dev->soc_info, clk_vote_level); &csiphy_dev->soc_info, clk_vote_level, false); if (rc) { CAM_WARN(CAM_CSIPHY, "Failed to set the clk_rate level: %d", Loading drivers/cam_utils/cam_soc_util.c +11 −1 Original line number Diff line number Diff line Loading @@ -907,7 +907,7 @@ static int cam_soc_util_get_dt_clk_info(struct cam_hw_soc_info *soc_info) } int cam_soc_util_set_clk_rate_level(struct cam_hw_soc_info *soc_info, enum cam_vote_level clk_level) enum cam_vote_level clk_level, bool do_not_set_src_clk) { int i, rc = 0; enum cam_vote_level apply_level; Loading @@ -928,6 +928,16 @@ int cam_soc_util_set_clk_rate_level(struct cam_hw_soc_info *soc_info, cam_cx_ipeak_update_vote_cx_ipeak(soc_info, apply_level); for (i = 0; i < soc_info->num_clk; i++) { if (do_not_set_src_clk && (i == soc_info->src_clk_idx)) { CAM_DBG(CAM_UTIL, "Skipping set rate for src clk %s", soc_info->clk_name[i]); continue; } CAM_DBG(CAM_UTIL, "Set rate for clk %s rate %d", soc_info->clk_name[i], soc_info->clk_rate[apply_level][i]); rc = cam_soc_util_set_clk_rate(soc_info->clk[i], soc_info->clk_name[i], soc_info->clk_rate[apply_level][i]); Loading drivers/cam_utils/cam_soc_util.h +2 −1 Original line number Diff line number Diff line Loading @@ -470,11 +470,12 @@ int cam_soc_util_clk_enable(struct clk *clk, const char *clk_name, * * @soc_info: Device soc information * @clk_level: Clock level number to set * @do_not_set_src_clk: If true, set clock rates except the src clk * * @return: Success or failure */ int cam_soc_util_set_clk_rate_level(struct cam_hw_soc_info *soc_info, enum cam_vote_level clk_level); enum cam_vote_level clk_level, bool do_not_set_src_clk); /** * cam_soc_util_clk_disable() Loading Loading
drivers/cam_cpas/cam_cpas_hw.c +1 −1 Original line number Diff line number Diff line Loading @@ -1204,7 +1204,7 @@ static int cam_cpas_util_apply_client_ahb_vote(struct cam_hw_info *cpas_hw, if (cpas_core->streamon_clients) { rc = cam_soc_util_set_clk_rate_level(&cpas_hw->soc_info, highest_level); highest_level, true); if (rc) { CAM_ERR(CAM_CPAS, "Failed in scaling clock rate level %d for AHB", Loading
drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.c +1 −1 Original line number Diff line number Diff line Loading @@ -1339,7 +1339,7 @@ int32_t cam_csiphy_core_cfg(void *phy_dev, csiphy_dev->ctrl_reg->getclockvoting( csiphy_dev, offset); rc = cam_soc_util_set_clk_rate_level( &csiphy_dev->soc_info, clk_vote_level); &csiphy_dev->soc_info, clk_vote_level, false); if (rc) { CAM_WARN(CAM_CSIPHY, "Failed to set the clk_rate level: %d", Loading
drivers/cam_utils/cam_soc_util.c +11 −1 Original line number Diff line number Diff line Loading @@ -907,7 +907,7 @@ static int cam_soc_util_get_dt_clk_info(struct cam_hw_soc_info *soc_info) } int cam_soc_util_set_clk_rate_level(struct cam_hw_soc_info *soc_info, enum cam_vote_level clk_level) enum cam_vote_level clk_level, bool do_not_set_src_clk) { int i, rc = 0; enum cam_vote_level apply_level; Loading @@ -928,6 +928,16 @@ int cam_soc_util_set_clk_rate_level(struct cam_hw_soc_info *soc_info, cam_cx_ipeak_update_vote_cx_ipeak(soc_info, apply_level); for (i = 0; i < soc_info->num_clk; i++) { if (do_not_set_src_clk && (i == soc_info->src_clk_idx)) { CAM_DBG(CAM_UTIL, "Skipping set rate for src clk %s", soc_info->clk_name[i]); continue; } CAM_DBG(CAM_UTIL, "Set rate for clk %s rate %d", soc_info->clk_name[i], soc_info->clk_rate[apply_level][i]); rc = cam_soc_util_set_clk_rate(soc_info->clk[i], soc_info->clk_name[i], soc_info->clk_rate[apply_level][i]); Loading
drivers/cam_utils/cam_soc_util.h +2 −1 Original line number Diff line number Diff line Loading @@ -470,11 +470,12 @@ int cam_soc_util_clk_enable(struct clk *clk, const char *clk_name, * * @soc_info: Device soc information * @clk_level: Clock level number to set * @do_not_set_src_clk: If true, set clock rates except the src clk * * @return: Success or failure */ int cam_soc_util_set_clk_rate_level(struct cam_hw_soc_info *soc_info, enum cam_vote_level clk_level); enum cam_vote_level clk_level, bool do_not_set_src_clk); /** * cam_soc_util_clk_disable() Loading