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Commit 01d9c8fb authored by Saurabh Sahu's avatar Saurabh Sahu Committed by Yogesh Lal
Browse files

ARM: dts: msm: Add dummy clock nodes for clock controllers for HOLI 

Dummy clock node are required for clocks clients to request, so add support
for the same. Also add the dummy GDSCs required by clients.

Change-Id: I9bdea8de477ed7c347a30078819c32181e520ff8
parent 9ae6c358

qcom/holi-gdsc.dtsi

0 → 100644
+116 −0
Original line number Original line Diff line number Diff line 
&soc {

	/* GDSCs in GCC */

	gcc_camss_top_gdsc: qcom,gdsc@1458004 {

		compatible = "regulator-fixed";

		reg = <0x1458004 0x4>;

		regulator-name = "gcc_camss_top_gdsc";

		status = "disabled";

	};



	gcc_ufs_phy_gdsc: qcom,gdsc@1445004 {

		compatible = "regulator-fixed";

		reg = <0x1445004 0x4>;

		regulator-name = "gcc_ufs_phy_gdsc";

		status = "disabled";

	};



	gcc_usb30_prim_gdsc: qcom,gdsc@141a004 {

		compatible = "regulator-fixed";

		reg = <0x141a004 0x4>;

		regulator-name = "gcc_usb30_prim_gdsc";

		status = "disabled";

	};



	gcc_vcodec0_gdsc: qcom,gdsc@1458098 {

		compatible = "regulator-fixed";

		reg = <0x1458098 0x4>;

		regulator-name = "gcc_vcodec0_gdsc";

		status = "disabled";

	};



	gcc_venus_gdsc: qcom,gdsc@145807c {

		compatible = "regulator-fixed";

		reg = <0x145807c 0x4>;

		regulator-name = "gcc_venus_gdsc";

		status = "disabled";

	};



	hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc: qcom,gdsc@147d074 {

		compatible = "regulator-fixed";

		reg = <0x147d074 0x4>;

		regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc";

		qcom,no-status-check-on-disable;

		status = "disabled";

	};



	hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc: qcom,gdsc@147d078 {

		compatible = "regulator-fixed";

		reg = <0x147d078 0x4>;

		regulator-name = "hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc";

		qcom,no-status-check-on-disable;

		status = "disabled";

	};



	hlos1_vote_turing_mmu_tbu1_gdsc: qcom,gdsc@147d060 {

		compatible = "regulator-fixed";

		reg = <0x147d060 0x4>;

		regulator-name = "hlos1_vote_turing_mmu_tbu1_gdsc";

		qcom,no-status-check-on-disable;

		status = "disabled";

	};



	hlos1_vote_turing_mmu_tbu0_gdsc: qcom,gdsc@147d07c {

		compatible = "regulator-fixed";

		reg = <0x147d07c 0x4>;

		regulator-name = "hlos1_vote_turing_mmu_tbu0_gdsc";

		qcom,no-status-check-on-disable;

		status = "disabled";

	};



	/* GDSCs in DISPCC */

	mdss_core_gdsc: qcom,gdsc@5f01004 {

		compatible = "regulator-fixed";

		reg = <0x5f01004 0x4>;

		regulator-name = "mdss_core_gdsc";

		proxy-supply = <&mdss_core_gdsc>;

		qcom,proxy-consumer-enable;

		status = "disabled";

	};



	/* GDSCs in GPUCC */

	gpu_gx_domain_addr: syscon@5991508 {

		compatible = "syscon";

		reg = <0x5991508 0x4>;

	};



	gpu_cx_hw_ctrl: syscon@5991540 {

		compatible = "syscon";

		reg = <0x5991540 0x4>;

	};



	gpu_gx_sw_reset: syscon@5991008 {

		compatible = "syscon";

		reg = <0x5991008 0x4>;

	};



	gpu_cx_gdsc: qcom,gdsc@599106c {

		compatible = "regulator-fixed";

		reg = <0x599106c 0x4>;

		regulator-name = "gpu_cx_gdsc";

		hw-ctrl-addr = <&gpu_cx_hw_ctrl>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		qcom,clk-dis-wait-val = <8>;

		status = "disabled";

	};



	gpu_gx_gdsc: qcom,gdsc@599100c {

		compatible = "regulator-fixed";

		reg = <0x599100c 0x4>;

		regulator-name = "gpu_gx_gdsc";

		sw-reset = <&gpu_gx_sw_reset>;

		domain-addr = <&gpu_gx_domain_addr>;

		qcom,reset-aon-logic;

		status = "disabled";

	};

};

qcom/holi.dtsi

+119 −0
Original line number Original line Diff line number Diff line 
#include <dt-bindings/clock/qcom,dispcc-holi.h>

#include <dt-bindings/clock/qcom,gcc-holi.h>

#include <dt-bindings/clock/qcom,gpucc-holi.h>

#include <dt-bindings/clock/qcom,rpmcc.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>





/ {

/ {
@@ -366,7 +370,122 @@ 
		#interrupt-cells = <3>;

		#interrupt-cells = <3>;

		#mbox-cells = <2>;

		#mbox-cells = <2>;

	};

	};



	clocks {

		xo_board: xo-board {

			compatible = "fixed-clock";

			clock-frequency = <38400000>;

			clock-output-names = "xo_board";

			#clock-cells = <0>;

		};



		sleep_clk: sleep-clk {

			compatible = "fixed-clock";

			clock-frequency = <32764>;

			clock-output-names = "chip_sleep_clk";

			#clock-cells = <0>;

		};

	};



	bi_tcxo: bi_tcxo {

		compatible = "fixed-factor-clock";

		clock-mult = <1>;

		clock-div = <2>;

		clocks = <&xo_board>;

		#clock-cells = <0>;

	};



	bi_tcxo_ao: bi_tcxo_ao {

		compatible = "fixed-factor-clock";

		clock-mult = <1>;

		clock-div = <2>;

		clocks = <&xo_board>;

		#clock-cells = <0>;

	};



	rpmcc: qcom,rpmcc {

		compatible = "qcom,dummycc";

		clock-output-names = "rpmcc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	gcc: qcom,gcc@1400000 {

		compatible = "qcom,dummycc";

		clock-output-names = "gcc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	dispcc: qcom,dispcc@5f00000 {

		compatible = "qcom,dummycc";

		clock-output-names = "dispcc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};



	gpucc: qcom,gpucc@5990000 {

		compatible = "qcom,dummycc";

		clock-output-names = "gpucc_clocks";

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

};

};





#include "holi-pinctrl.dtsi"

#include "holi-pinctrl.dtsi"

#include "holi-stub-regulator.dtsi"

#include "holi-stub-regulator.dtsi"

#include "holi-gdsc.dtsi"



&gcc_camss_top_gdsc {

	status = "ok";

};



&gcc_ufs_phy_gdsc {

	status = "ok";

};



&gcc_usb30_prim_gdsc {

	status = "ok";

};



&gcc_vcodec0_gdsc {

	qcom,support-hw-trigger;

	status = "ok";

};



&gcc_venus_gdsc {

	status = "ok";

};



&hlos1_vote_mm_snoc_mmu_tbu_rt_gdsc {

	status = "ok";

};



&hlos1_vote_mm_snoc_mmu_tbu_nrt_gdsc {

	status = "ok";

};



&hlos1_vote_turing_mmu_tbu1_gdsc {

	status = "ok";

};



&hlos1_vote_turing_mmu_tbu0_gdsc {

	status = "ok";

};



&mdss_core_gdsc {

	qcom,support-hw-trigger;

	status = "ok";

};



&gpu_cx_gdsc {

	parent-supply = <&VDD_CX_LEVEL>;

	vdd_parent-supply = <&VDD_CX_LEVEL>;

	status = "ok";

};



&gpu_gx_gdsc {

	parent-supply = <&VDD_CX_LEVEL>;

	vdd_parent-supply = <&VDD_CX_LEVEL>;

	status = "ok";

};