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Commit fe99f1b1 authored by Chris Dearman's avatar Chris Dearman Committed by Ralf Baechle
Browse files

[MIPS] lockdep: Deal with interrupt disable hazard in TRACE_IRQFLAGS 



Between the mtc0 or di instruction that disables interrupts and the
following hazard barrier a processor may still take interrupts.  If an
interrupt is taken after interrupts are disabled but before the state
is updated it will appear to restore_all that it is incorrectly returning
with interrupts disabled.

Signed-off-by: default avatarChris Dearman <chris@mips.com>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent cbde5ebc

arch/mips/kernel/genex.S

+31 −0
Original line number Diff line number Diff line
@@ -128,6 +128,37 @@ handle_vcei: 


	.align  5

NESTED(handle_int, PT_SIZE, sp)

#ifdef CONFIG_TRACE_IRQFLAGS

	/*

	 * Check to see if the interrupted code has just disabled

	 * interrupts and ignore this interrupt for now if so.

	 *

	 * local_irq_disable() disables interrupts and then calls

	 * trace_hardirqs_off() to track the state. If an interrupt is taken

	 * after interrupts are disabled but before the state is updated

	 * it will appear to restore_all that it is incorrectly returning with

	 * interrupts disabled

	 */

	.set	push

	.set	noat

	mfc0	k0, CP0_STATUS

#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)

	and	k0, ST0_IEP

	bnez	k0, 1f



	mfc0	k0, EP0_EPC

	.set	noreorder

	j	k0

	rfe

#else

	and	k0, ST0_IE

	bnez	k0, 1f



	eret

#endif

1:

	.set pop

#endif

	SAVE_ALL

	CLI

	TRACE_IRQS_OFF