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Commit fe614dee authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "qcom: rpmcc: Add support for GNOC & GPU clock for Scuba"

parents a01aa5bb 201df022

drivers/clk/qcom/clk-smd-rpm.c

+9 −1
Original line number Diff line number Diff line
@@ -863,6 +863,10 @@ DEFINE_CLK_SMD_RPM_XO_BUFFER(scuba, rf_clk3, rf_clk3_a, 6); 
DEFINE_CLK_SMD_RPM(scuba, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0);

DEFINE_CLK_SMD_RPM(scuba, hwkm_clk, hwkm_a_clk, QCOM_SMD_RPM_HWKM_CLK, 0);

DEFINE_CLK_SMD_RPM(scuba, pka_clk, pka_a_clk, QCOM_SMD_RPM_PKA_CLK, 0);

DEFINE_CLK_SMD_RPM(scuba, cpuss_gnoc_clk, cpuss_gnoc_a_clk,

						QCOM_SMD_RPM_MEM_CLK, 1);

DEFINE_CLK_SMD_RPM(scuba, bimc_gpu_clk, bimc_gpu_a_clk,

						QCOM_SMD_RPM_MEM_CLK, 2);



/* Scuba */

static struct clk_hw *scuba_clks[] = {
@@ -952,11 +956,15 @@ static struct clk_hw *scuba_clks[] = { 
	[RPM_SMD_HWKM_A_CLK] = &scuba_hwkm_a_clk.hw,

	[RPM_SMD_PKA_CLK] = &scuba_pka_clk.hw,

	[RPM_SMD_PKA_A_CLK] = &scuba_pka_a_clk.hw,

	[RPM_SMD_BIMC_GPU_CLK] = &scuba_bimc_gpu_clk.hw,

	[RPM_SMD_BIMC_GPU_A_CLK] = &scuba_bimc_gpu_a_clk.hw,

	[RPM_SMD_CPUSS_GNOC_CLK] = &scuba_cpuss_gnoc_clk.hw,

	[RPM_SMD_CPUSS_GNOC_A_CLK] = &scuba_cpuss_gnoc_a_clk.hw,

};



static const struct rpm_smd_clk_desc rpm_clk_scuba = {

	.clks = scuba_clks,

	.num_rpm_clks = RPM_SMD_PKA_A_CLK,

	.num_rpm_clks = RPM_SMD_CPUSS_GNOC_A_CLK,

	.num_clks = ARRAY_SIZE(scuba_clks),

};

include/dt-bindings/clock/qcom,rpmcc.h

+68 −66
Original line number Diff line number Diff line
@@ -163,71 +163,73 @@ 
#define RPM_SMD_CNOC_PERIPH_A_CLK	     111

#define RPM_SMD_MMSSNOC_AXI_CLK		     112

#define RPM_SMD_MMSSNOC_AXI_A_CLK	     113

#define PNOC_MSMBUS_CLK				     114

#define PNOC_MSMBUS_A_CLK			     115

#define PNOC_KEEPALIVE_A_CLK		     116

#define SNOC_MSMBUS_CLK				     117

#define SNOC_MSMBUS_A_CLK			     118

#define BIMC_MSMBUS_CLK				     119

#define BIMC_MSMBUS_A_CLK			     120

#define PNOC_USB_CLK				     121

#define PNOC_USB_A_CLK				     122

#define SNOC_USB_CLK				     123

#define SNOC_USB_A_CLK				     124

#define BIMC_USB_CLK				     125

#define BIMC_USB_A_CLK				     126

#define SNOC_WCNSS_A_CLK			     127

#define BIMC_WCNSS_A_CLK			     128

#define MCD_CE1_CLK				         129

#define QCEDEV_CE1_CLK				     130

#define QCRYPTO_CE1_CLK				     131

#define QSEECOM_CE1_CLK				     132

#define SCM_CE1_CLK				         133

#define CXO_SMD_OTG_CLK				     134

#define CXO_SMD_LPM_CLK				     135

#define CXO_SMD_PIL_PRONTO_CLK		     136

#define CXO_SMD_PIL_MSS_CLK			     137

#define CXO_SMD_WLAN_CLK			     138

#define CXO_SMD_PIL_LPASS_CLK		     139

#define CXO_SMD_PIL_CDSP_CLK		     140

#define CXO_DWC3_CLK				     141

#define CNOC_MSMBUS_CLK				     142

#define CNOC_MSMBUS_A_CLK			     143

#define CNOC_KEEPALIVE_A_CLK		     144

#define SNOC_KEEPALIVE_A_CLK			 145

#define CPP_MMNRT_MSMBUS_CLK			 146

#define CPP_MMNRT_MSMBUS_A_CLK			 147

#define JPEG_MMNRT_MSMBUS_CLK			 148

#define JPEG_MMNRT_MSMBUS_A_CLK			 149

#define VENUS_MMNRT_MSMBUS_CLK			 150

#define VENUS_MMNRT_MSMBUS_A_CLK		 151

#define ARM9_MMNRT_MSMBUS_CLK			 152

#define ARM9_MMNRT_MSMBUS_A_CLK			 153

#define MDP_MMRT_MSMBUS_CLK			     154

#define MDP_MMRT_MSMBUS_A_CLK			 155

#define VFE_MMRT_MSMBUS_CLK			     156

#define VFE_MMRT_MSMBUS_A_CLK			 157

#define QUP0_MSMBUS_SNOC_PERIPH_CLK			158

#define QUP0_MSMBUS_SNOC_PERIPH_A_CLK	    159

#define QUP1_MSMBUS_SNOC_PERIPH_CLK		    160

#define QUP1_MSMBUS_SNOC_PERIPH_A_CLK	    161

#define QUP2_MSMBUS_SNOC_PERIPH_CLK         162

#define QUP2_MSMBUS_SNOC_PERIPH_A_CLK       163

#define DAP_MSMBUS_SNOC_PERIPH_CLK		    164

#define DAP_MSMBUS_SNOC_PERIPH_A_CLK	    165

#define SDC1_MSMBUS_SNOC_PERIPH_CLK		    166

#define SDC1_MSMBUS_SNOC_PERIPH_A_CLK	    167

#define SDC2_MSMBUS_SNOC_PERIPH_CLK		    168

#define SDC2_MSMBUS_SNOC_PERIPH_A_CLK	    169

#define CRYPTO_MSMBUS_SNOC_PERIPH_CLK	    170

#define CRYPTO_MSMBUS_SNOC_PERIPH_A_CLK		171

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_CLK		172

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_A_CLK	173

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_CLK		174

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_A_CLK	175

#define AGGR2_NOC_MSMBUS_CLK		        176

#define AGGR2_NOC_MSMBUS_A_CLK		        177

#define AGGR2_NOC_SMMU_CLK			        178

#define AGGR2_NOC_USB_CLK			        179

#define RPM_SMD_CPUSS_GNOC_CLK			114

#define RPM_SMD_CPUSS_GNOC_A_CLK			115

#define PNOC_MSMBUS_CLK				     116

#define PNOC_MSMBUS_A_CLK			     117

#define PNOC_KEEPALIVE_A_CLK		     118

#define SNOC_MSMBUS_CLK				     119

#define SNOC_MSMBUS_A_CLK			     120

#define BIMC_MSMBUS_CLK				     121

#define BIMC_MSMBUS_A_CLK			     122

#define PNOC_USB_CLK				     123

#define PNOC_USB_A_CLK				     124

#define SNOC_USB_CLK				     125

#define SNOC_USB_A_CLK				     126

#define BIMC_USB_CLK				     127

#define BIMC_USB_A_CLK				     128

#define SNOC_WCNSS_A_CLK			     129

#define BIMC_WCNSS_A_CLK			     130

#define MCD_CE1_CLK				         131

#define QCEDEV_CE1_CLK				     132

#define QCRYPTO_CE1_CLK				     133

#define QSEECOM_CE1_CLK				     134

#define SCM_CE1_CLK				         135

#define CXO_SMD_OTG_CLK				     136

#define CXO_SMD_LPM_CLK				     137

#define CXO_SMD_PIL_PRONTO_CLK		     138

#define CXO_SMD_PIL_MSS_CLK			     139

#define CXO_SMD_WLAN_CLK			     140

#define CXO_SMD_PIL_LPASS_CLK		     141

#define CXO_SMD_PIL_CDSP_CLK		     142

#define CXO_DWC3_CLK				     143

#define CNOC_MSMBUS_CLK				     144

#define CNOC_MSMBUS_A_CLK			     145

#define CNOC_KEEPALIVE_A_CLK		     146

#define SNOC_KEEPALIVE_A_CLK			 147

#define CPP_MMNRT_MSMBUS_CLK			 148

#define CPP_MMNRT_MSMBUS_A_CLK			 149

#define JPEG_MMNRT_MSMBUS_CLK			 150

#define JPEG_MMNRT_MSMBUS_A_CLK			 151

#define VENUS_MMNRT_MSMBUS_CLK			 152

#define VENUS_MMNRT_MSMBUS_A_CLK		 153

#define ARM9_MMNRT_MSMBUS_CLK			 154

#define ARM9_MMNRT_MSMBUS_A_CLK			 155

#define MDP_MMRT_MSMBUS_CLK			     156

#define MDP_MMRT_MSMBUS_A_CLK			 157

#define VFE_MMRT_MSMBUS_CLK			     158

#define VFE_MMRT_MSMBUS_A_CLK			 159

#define QUP0_MSMBUS_SNOC_PERIPH_CLK			160

#define QUP0_MSMBUS_SNOC_PERIPH_A_CLK	    161

#define QUP1_MSMBUS_SNOC_PERIPH_CLK		    162

#define QUP1_MSMBUS_SNOC_PERIPH_A_CLK	    163

#define QUP2_MSMBUS_SNOC_PERIPH_CLK         164

#define QUP2_MSMBUS_SNOC_PERIPH_A_CLK       165

#define DAP_MSMBUS_SNOC_PERIPH_CLK		    166

#define DAP_MSMBUS_SNOC_PERIPH_A_CLK	    167

#define SDC1_MSMBUS_SNOC_PERIPH_CLK		    168

#define SDC1_MSMBUS_SNOC_PERIPH_A_CLK	    169

#define SDC2_MSMBUS_SNOC_PERIPH_CLK		    170

#define SDC2_MSMBUS_SNOC_PERIPH_A_CLK	    171

#define CRYPTO_MSMBUS_SNOC_PERIPH_CLK	    172

#define CRYPTO_MSMBUS_SNOC_PERIPH_A_CLK		173

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_CLK		174

#define SDC1_SLV_MSMBUS_SNOC_PERIPH_A_CLK	175

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_CLK		176

#define SDC2_SLV_MSMBUS_SNOC_PERIPH_A_CLK	177

#define AGGR2_NOC_MSMBUS_CLK		        178

#define AGGR2_NOC_MSMBUS_A_CLK		        179

#define AGGR2_NOC_SMMU_CLK			        180

#define AGGR2_NOC_USB_CLK			        181



#endif