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Commit fe132d1a authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-for-4.16-arm-dt' of... 

Merge tag 'tegra-for-4.16-arm-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Pull "ARM: tegra: Device tree changes for v4.16-rc1" from Thierry Reding:

These changes enable the video decoder engine found on Tegra20 SoCs.

* tag 'tegra-for-4.16-arm-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Add video decoder on Tegra20
  ARM: tegra: Add device tree node to describe IRAM on Tegra20
parents 30e18df6 bb768f28

arch/arm/boot/dts/tegra20.dtsi

+35 −0
Original line number Diff line number Diff line
@@ -10,6 +10,19 @@ 
	compatible = "nvidia,tegra20";

	interrupt-parent = <&lic>;



	iram@40000000 {

		compatible = "mmio-sram";

		reg = <0x40000000 0x40000>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0x40000000 0x40000>;



		vde_pool: vde {

			reg = <0x400 0x3fc00>;

			pool;

		};

	};



	host1x@50000000 {

		compatible = "nvidia,tegra20-host1x", "simple-bus";

		reg = <0x50000000 0x00024000>;
@@ -250,6 +263,28 @@ 
		*/

	};



	vde@6001a000 {

		compatible = "nvidia,tegra20-vde";

		reg = <0x6001a000 0x1000   /* Syntax Engine */

		       0x6001b000 0x1000   /* Video Bitstream Engine */

		       0x6001c000  0x100   /* Macroblock Engine */

		       0x6001c200  0x100   /* Post-processing Engine */

		       0x6001c400  0x100   /* Motion Compensation Engine */

		       0x6001c600  0x100   /* Transform Engine */

		       0x6001c800  0x100   /* Pixel prediction block */

		       0x6001ca00  0x100   /* Video DMA */

		       0x6001d800  0x300>; /* Video frame controls */

		reg-names = "sxe", "bsev", "mbe", "ppe", "mce",

			    "tfe", "ppb", "vdma", "frameid";

		iram = <&vde_pool>; /* IRAM region */

		interrupts = <GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>, /* Sync token interrupt */

			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, /* BSE-V interrupt */

			     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */

		interrupt-names = "sync-token", "bsev", "sxe";

		clocks = <&tegra_car TEGRA20_CLK_VDE>;

		resets = <&tegra_car 61>;

	};



	apbmisc@70000800 {

		compatible = "nvidia,tegra20-apbmisc";

		reg = <0x70000800 0x64   /* Chip revision */