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Commit fce8591f authored by Pratyush Anand's avatar Pratyush Anand Committed by Bjorn Helgaas
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PCI: designware: Fix I/O transfers by using CPU (not realio) address 



pp->io_base, which is the input of the outbound IO address translation
unit, should be the CPU address.  It was incorrectly programmed to the
realio address.

We should pass global_io_offset rather than sys->io_offset to
pci_ioremap_io(), so we map the new window into the first available spot in
the Linux view of the I/O space.

We must also pass CPU address instead of realio address to pci_ioremap_io().

This patch fixes above issue.  It has been tested with Lecroy PTC in AIC
mode and Pericom PI7C9X2G303EL PCIe switch, which does not work otherwise.

Tested-by: default avatarMohit Kumar <mohit.kumar@st.com>
Tested-by: default avatarTim Harvey <tharvey@gateworks.com>
Signed-off-by: default avatarPratyush Anand <pratyush.anand@st.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarMarek Vasut <marex@denx.de>
Reviewed-by: default avatarJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Acked-by: default avatarJingoo Han <jg1.han@samsung.com>
Cc: Richard Zhu <Hong-Xing.Zhu@freescale.com>
parent a01ef59e

drivers/pci/host/pcie-designware.c

+2 −3
Original line number Diff line number Diff line
@@ -418,6 +418,7 @@ int __init dw_pcie_host_init(struct pcie_port *pp) 
					   + global_io_offset);

			pp->config.io_size = resource_size(&pp->io);

			pp->config.io_bus_addr = range.pci_addr;

			pp->io_base = range.cpu_addr;

		}

		if (restype == IORESOURCE_MEM) {

			of_pci_range_to_resource(&range, np, &pp->mem);
@@ -443,7 +444,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp) 


	pp->cfg0_base = pp->cfg.start;

	pp->cfg1_base = pp->cfg.start + pp->config.cfg0_size;

	pp->io_base = pp->io.start;

	pp->mem_base = pp->mem.start;



	pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
@@ -613,7 +613,6 @@ static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, 
	return ret;

}





static int dw_pcie_valid_config(struct pcie_port *pp,

				struct pci_bus *bus, int dev)

{
@@ -707,7 +706,7 @@ static int dw_pcie_setup(int nr, struct pci_sys_data *sys) 


	if (global_io_offset < SZ_1M && pp->config.io_size > 0) {

		sys->io_offset = global_io_offset - pp->config.io_bus_addr;

		pci_ioremap_io(sys->io_offset, pp->io.start);

		pci_ioremap_io(global_io_offset, pp->io_base);

		global_io_offset += SZ_64K;

		pci_add_resource_offset(&sys->resources, &pp->io,

					sys->io_offset);