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Commit f84aff4e authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/sw: namespace + nvidia gpu names (no binary change) 



The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 25a64025

drivers/gpu/drm/nouveau/include/nvkm/core/os.h

+2 −0
Original line number Diff line number Diff line
@@ -251,5 +251,7 @@ 
#define nouveau_fifo_chan nvkm_fifo_chan

#define nouveau_fifo nvkm_fifo

#define nouveau_gr nvkm_gr

#define nouveau_sw nvkm_sw

#define nouveau_sw_chan nvkm_sw_chan



#endif

drivers/gpu/drm/nouveau/include/nvkm/engine/sw.h

+38 −39
Original line number Diff line number Diff line 
#ifndef __NOUVEAU_SW_H__

#define __NOUVEAU_SW_H__



#include <core/engine.h>

#ifndef __NVKM_SW_H__

#define __NVKM_SW_H__

#include <core/engctx.h>



struct nouveau_sw_chan {

	struct nouveau_engctx base;

struct nvkm_sw_chan {

	struct nvkm_engctx base;



	int (*flip)(void *);

	void *flip_data;

};



#define nouveau_sw_context_create(p,e,c,d)                               \

	nouveau_engctx_create((p), (e), (c), (p), 0, 0, 0, (d))

#define nouveau_sw_context_destroy(d)                                    \

	nouveau_engctx_destroy(&(d)->base)

#define nouveau_sw_context_init(d)                                       \

	nouveau_engctx_init(&(d)->base)

#define nouveau_sw_context_fini(d,s)                                     \

	nouveau_engctx_fini(&(d)->base, (s))



#define _nouveau_sw_context_dtor _nouveau_engctx_dtor

#define _nouveau_sw_context_init _nouveau_engctx_init

#define _nouveau_sw_context_fini _nouveau_engctx_fini



struct nouveau_sw {

	struct nouveau_engine base;

};



#define nouveau_sw_create(p,e,c,d)                                       \

	nouveau_engine_create((p), (e), (c), true, "SW", "software", (d))

#define nouveau_sw_destroy(d)                                            \

	nouveau_engine_destroy(&(d)->base)

#define nouveau_sw_init(d)                                               \

	nouveau_engine_init(&(d)->base)

#define nouveau_sw_fini(d,s)                                             \

	nouveau_engine_fini(&(d)->base, (s))

#define nvkm_sw_context_create(p,e,c,d)                               \

	nvkm_engctx_create((p), (e), (c), (p), 0, 0, 0, (d))

#define nvkm_sw_context_destroy(d)                                    \

	nvkm_engctx_destroy(&(d)->base)

#define nvkm_sw_context_init(d)                                       \

	nvkm_engctx_init(&(d)->base)

#define nvkm_sw_context_fini(d,s)                                     \

	nvkm_engctx_fini(&(d)->base, (s))



#define _nouveau_sw_dtor _nouveau_engine_dtor

#define _nouveau_sw_init _nouveau_engine_init

#define _nouveau_sw_fini _nouveau_engine_fini

#define _nvkm_sw_context_dtor _nvkm_engctx_dtor

#define _nvkm_sw_context_init _nvkm_engctx_init

#define _nvkm_sw_context_fini _nvkm_engctx_fini



extern struct nouveau_oclass *nv04_sw_oclass;

extern struct nouveau_oclass *nv10_sw_oclass;

extern struct nouveau_oclass *nv50_sw_oclass;

extern struct nouveau_oclass *nvc0_sw_oclass;

#include <core/engine.h>



void nv04_sw_intr(struct nouveau_subdev *);

struct nvkm_sw {

	struct nvkm_engine base;

};



#define nvkm_sw_create(p,e,c,d)                                       \

	nvkm_engine_create((p), (e), (c), true, "SW", "software", (d))

#define nvkm_sw_destroy(d)                                            \

	nvkm_engine_destroy(&(d)->base)

#define nvkm_sw_init(d)                                               \

	nvkm_engine_init(&(d)->base)

#define nvkm_sw_fini(d,s)                                             \

	nvkm_engine_fini(&(d)->base, (s))



#define _nvkm_sw_dtor _nvkm_engine_dtor

#define _nvkm_sw_init _nvkm_engine_init

#define _nvkm_sw_fini _nvkm_engine_fini



extern struct nvkm_oclass *nv04_sw_oclass;

extern struct nvkm_oclass *nv10_sw_oclass;

extern struct nvkm_oclass *nv50_sw_oclass;

extern struct nvkm_oclass *gf100_sw_oclass;



void nv04_sw_intr(struct nvkm_subdev *);

#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c

+2 −2
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ gm100_identify(struct nouveau_device *device) 
#endif

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gm107_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
@@ -129,7 +129,7 @@ gm100_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

#if 0

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DISP   ] =  gm204_disp_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c

+9 −9
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf100_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;
@@ -115,7 +115,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf104_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;
@@ -148,7 +148,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf104_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;
@@ -180,7 +180,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf104_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;
@@ -213,7 +213,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf104_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;
@@ -245,7 +245,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf108_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;
@@ -277,7 +277,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf100_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf110_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;
@@ -310,7 +310,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf119_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;
@@ -340,7 +340,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gf100_bar_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gf100_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gf117_gr_oclass;

		device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass;

		device->oclass[NVDEV_ENGINE_MSVLD  ] = &gf100_msvld_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c

+8 −8
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk104_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
@@ -116,7 +116,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk104_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
@@ -150,7 +150,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk104_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk104_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
@@ -176,7 +176,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_BAR    ] = &gk20a_bar_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk20a_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk20a_gr_oclass;

		device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;

		device->oclass[NVDEV_ENGINE_PM     ] = &gk104_pm_oclass;
@@ -206,7 +206,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk110_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
@@ -240,7 +240,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk104_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
@@ -274,7 +274,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk208_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
@@ -307,7 +307,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;

		device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_sw_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk208_gr_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  gk110_disp_oclass;

		device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;