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Commit f3910c62 authored by Raju Rangoju's avatar Raju Rangoju Committed by David S. Miller
Browse files

cxgb4: Support firmware rdma write completion work request. 



If FW supports RDMA WRITE_COMPLETION functionality, then advertise that
to the ULDs. This will be used by iw_cxgb4 to allow WRITE_COMPLETION
work requests.

Signed-off-by: default avatarPotnuri Bharat Teja <bharat@chelsio.com>
Signed-off-by: default avatarRaju Rangoju <rajur@chelsio.com>
Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarSteve Wise <swise@opengridcomputing.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 43db9296

drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

+1 −0
Original line number Diff line number Diff line
@@ -391,6 +391,7 @@ struct adapter_params { 
	 */

	u8 mps_bg_map[MAX_NPORTS];	/* MPS Buffer Group Map */

	bool write_w_imm_support;       /* FW supports WRITE_WITH_IMMEDIATE */

	bool write_cmpl_support;        /* FW supports WRITE_CMPL */

};



/* State needed to monitor the forward progress of SGE Ingress DMA activities

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

+6 −0
Original line number Diff line number Diff line
@@ -4525,6 +4525,12 @@ static int adap_init0(struct adapter *adap) 
		ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, params,

				      val);

		adap->params.write_w_imm_support = (ret == 0 && val[0] != 0);



		/* Enable write_cmpl if FW supports it */

		params[0] = FW_PARAM_DEV(RI_WRITE_CMPL_WR);

		ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, params,

				      val);

		adap->params.write_cmpl_support = (ret == 0 && val[0] != 0);

		adap->num_ofld_uld += 2;

	}

	if (caps_cmd.iscsicaps) {

drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c

+1 −0
Original line number Diff line number Diff line
@@ -667,6 +667,7 @@ static void uld_init(struct adapter *adap, struct cxgb4_lld_info *lld) 
	lld->nodeid = dev_to_node(adap->pdev_dev);

	lld->fr_nsmr_tpte_wr_support = adap->params.fr_nsmr_tpte_wr_support;

	lld->write_w_imm_support = adap->params.write_w_imm_support;

	lld->write_cmpl_support = adap->params.write_cmpl_support;

}



static void uld_attach(struct adapter *adap, unsigned int uld)

drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h

+1 −0
Original line number Diff line number Diff line
@@ -355,6 +355,7 @@ struct cxgb4_lld_info { 
	int nodeid;			     /* device numa node id */

	bool fr_nsmr_tpte_wr_support;	     /* FW supports FR_NSMR_TPTE_WR */

	bool write_w_imm_support;         /* FW supports WRITE_WITH_IMMEDIATE */

	bool write_cmpl_support;             /* FW supports WRITE_CMPL WR */

};



struct cxgb4_uld_info {

drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h

+2 −0
Original line number Diff line number Diff line
@@ -101,6 +101,7 @@ enum fw_wr_opcodes { 
	FW_RI_BIND_MW_WR               = 0x18,

	FW_RI_FR_NSMR_WR               = 0x19,

	FW_RI_FR_NSMR_TPTE_WR	       = 0x20,

	FW_RI_RDMA_WRITE_CMPL_WR       = 0x21,

	FW_RI_INV_LSTAG_WR             = 0x1a,

	FW_ISCSI_TX_DATA_WR	       = 0x45,

	FW_PTP_TX_PKT_WR               = 0x46,
@@ -1214,6 +1215,7 @@ enum fw_params_param_dev { 
	FW_PARAMS_PARAM_DEV_MPSBGMAP	= 0x1E,

	FW_PARAMS_PARAM_DEV_HMA_SIZE	= 0x20,

	FW_PARAMS_PARAM_DEV_RDMA_WRITE_WITH_IMM = 0x21,

	FW_PARAMS_PARAM_DEV_RI_WRITE_CMPL_WR    = 0x24,

};



/*