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Commit 43db9296 authored Mar 20, 2018 by Raju Rangoju Committed by David S. Miller Mar 22, 2018

cxgb4: Support firmware rdma write with immediate work request.



If FW supports RDMA WRITE_WITH_IMMEDATE functionality, then advertise
that
to the ULDs. This will be used by iw_cxgb4 to allow WRITE_WITH_IMMEDIATE
work requests.

Signed-off-by: Potnuri Bharat Teja <bharat@chelsio.com>
Signed-off-by: Raju Rangoju <rajur@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

parent c68644ef

drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -390,6 +390,7 @@ struct adapter_params {
	* used by the Port		* used by the Port
	*/		*/
	u8 mps_bg_map[MAX_NPORTS]; /* MPS Buffer Group Map */		u8 mps_bg_map[MAX_NPORTS]; /* MPS Buffer Group Map */
			bool write_w_imm_support; /* FW supports WRITE_WITH_IMMEDIATE */
	};		};

	/* State needed to monitor the forward progress of SGE Ingress DMA activities		/* State needed to monitor the forward progress of SGE Ingress DMA activities

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

+6 −0

Original line number	Original line	Diff line number	Diff line
	@@ -4519,6 +4519,12 @@ static int adap_init0(struct adapter *adap)
	"max_ordird_qp %d max_ird_adapter %d\n",		"max_ordird_qp %d max_ird_adapter %d\n",
	adap->params.max_ordird_qp,		adap->params.max_ordird_qp,
	adap->params.max_ird_adapter);		adap->params.max_ird_adapter);

			/* Enable write_with_immediate if FW supports it */
			params[0] = FW_PARAM_DEV(RDMA_WRITE_WITH_IMM);
			ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1, params,
			val);
			adap->params.write_w_imm_support = (ret == 0 && val[0] != 0);
	adap->num_ofld_uld += 2;		adap->num_ofld_uld += 2;
	}		}
	if (caps_cmd.iscsicaps) {		if (caps_cmd.iscsicaps) {

drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.c

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -666,6 +666,7 @@ static void uld_init(struct adapter adap, struct cxgb4_lld_info lld)
	lld->ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl;		lld->ulptx_memwrite_dsgl = adap->params.ulptx_memwrite_dsgl;
	lld->nodeid = dev_to_node(adap->pdev_dev);		lld->nodeid = dev_to_node(adap->pdev_dev);
	lld->fr_nsmr_tpte_wr_support = adap->params.fr_nsmr_tpte_wr_support;		lld->fr_nsmr_tpte_wr_support = adap->params.fr_nsmr_tpte_wr_support;
			lld->write_w_imm_support = adap->params.write_w_imm_support;
	}		}

	static void uld_attach(struct adapter *adap, unsigned int uld)		static void uld_attach(struct adapter *adap, unsigned int uld)

drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -354,6 +354,7 @@ struct cxgb4_lld_info {
	void *iscsi_ppm; / iscsi page pod manager */		void *iscsi_ppm; / iscsi page pod manager */
	int nodeid; /* device numa node id */		int nodeid; /* device numa node id */
	bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */		bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */
			bool write_w_imm_support; /* FW supports WRITE_WITH_IMMEDIATE */
	};		};

	struct cxgb4_uld_info {		struct cxgb4_uld_info {

drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1213,6 +1213,7 @@ enum fw_params_param_dev {
	FW_PARAMS_PARAM_DEV_FILTER2_WR = 0x1D,		FW_PARAMS_PARAM_DEV_FILTER2_WR = 0x1D,
	FW_PARAMS_PARAM_DEV_MPSBGMAP = 0x1E,		FW_PARAMS_PARAM_DEV_MPSBGMAP = 0x1E,
	FW_PARAMS_PARAM_DEV_HMA_SIZE = 0x20,		FW_PARAMS_PARAM_DEV_HMA_SIZE = 0x20,
			FW_PARAMS_PARAM_DEV_RDMA_WRITE_WITH_IMM = 0x21,
	};		};

	/*		/*