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Commit f1d38d4f authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Initialize CP engine before loading the zap shader"

parents 9988233b 50de34dd
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+14 −15
Original line number Diff line number Diff line
@@ -579,24 +579,15 @@ static void a6xx_start(struct adreno_device *adreno_dev)
}

/*
 * a6xx_microcode_load() - Load microcode
 * a6xx_zap_load() - Load zap shader
 * @adreno_dev: Pointer to adreno device
 */
static int a6xx_microcode_load(struct adreno_device *adreno_dev)
static int a6xx_zap_load(struct adreno_device *adreno_dev)
{
	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
	struct adreno_firmware *fw = ADRENO_FW(adreno_dev, ADRENO_FW_SQE);
	const struct adreno_a6xx_core *a6xx_core = to_a6xx_core(adreno_dev);
	uint64_t gpuaddr;
	void *zap;
	int ret = 0;

	gpuaddr = fw->memdesc.gpuaddr;
	kgsl_regwrite(device, A6XX_CP_SQE_INSTR_BASE_LO,
				lower_32_bits(gpuaddr));
	kgsl_regwrite(device, A6XX_CP_SQE_INSTR_BASE_HI,
				upper_32_bits(gpuaddr));

	/* Load the zap shader firmware through PIL if its available */
	if (a6xx_core->zap_name && !adreno_dev->zap_loaded) {
		zap = subsystem_get(a6xx_core->zap_name);
@@ -821,6 +812,7 @@ static int a6xx_rb_start(struct adreno_device *adreno_dev)
{
	struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);
	struct kgsl_device *device = &adreno_dev->dev;
	struct adreno_firmware *fw = ADRENO_FW(adreno_dev, ADRENO_FW_SQE);
	uint64_t addr;
	int ret;

@@ -839,13 +831,16 @@ static int a6xx_rb_start(struct adreno_device *adreno_dev)
	adreno_writereg64(adreno_dev, ADRENO_REG_CP_RB_BASE,
			ADRENO_REG_CP_RB_BASE_HI, rb->buffer_desc.gpuaddr);

	ret = a6xx_microcode_load(adreno_dev);
	if (ret)
		return ret;

	if (ADRENO_FEATURE(adreno_dev, ADRENO_APRIV))
		kgsl_regwrite(device, A6XX_CP_APRIV_CNTL, A6XX_APRIV_DEFAULT);

	/* Program the ucode base for CP */
	kgsl_regwrite(device, A6XX_CP_SQE_INSTR_BASE_LO,
			lower_32_bits(fw->memdesc.gpuaddr));

	kgsl_regwrite(device, A6XX_CP_SQE_INSTR_BASE_HI,
			upper_32_bits(fw->memdesc.gpuaddr));

	/* Clear the SQE_HALT to start the CP engine */
	kgsl_regwrite(device, A6XX_CP_SQE_CNTL, 1);

@@ -853,6 +848,10 @@ static int a6xx_rb_start(struct adreno_device *adreno_dev)
	if (ret)
		return ret;

	ret = a6xx_zap_load(adreno_dev);
	if (ret)
		return ret;

	/* GPU comes up in secured mode, make it unsecured by default */
	ret = adreno_set_unsecured_mode(adreno_dev, rb);
	if (ret)