Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e9ce1a62 authored by Ander Conselvan de Oliveira's avatar Ander Conselvan de Oliveira
Browse files

drm/i915: Pass intel_crtc to DDI functions called from crtc en/disable 



Pass intel_crtc to functions intel_ddi_enable_transcoder_func(),
intel_ddi_set_pipe_settings() and intel_ddi_set_vc_payload_alloc(),
instead of the generic crtc type. By changing the functions
intel_ddi_get_crtc_encoder() so that it receives an intel_crtc
parameter, there is no need for the drm_crtc in the callers.

Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170302125857.14665-6-ander.conselvan.de.oliveira@intel.com
parent dc4a1094

drivers/gpu/drm/i915/intel_ddi.c

+27 −35
Original line number Diff line number Diff line
@@ -818,21 +818,20 @@ void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder) 
}



static struct intel_encoder *

intel_ddi_get_crtc_encoder(struct drm_crtc *crtc)

intel_ddi_get_crtc_encoder(struct intel_crtc *crtc)

{

	struct drm_device *dev = crtc->dev;

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct drm_device *dev = crtc->base.dev;

	struct intel_encoder *intel_encoder, *ret = NULL;

	int num_encoders = 0;



	for_each_encoder_on_crtc(dev, crtc, intel_encoder) {

	for_each_encoder_on_crtc(dev, &crtc->base, intel_encoder) {

		ret = intel_encoder;

		num_encoders++;

	}



	if (num_encoders != 1)

		WARN(1, "%d encoders on crtc for pipe %c\n", num_encoders,

		     pipe_name(intel_crtc->pipe));

		     pipe_name(crtc->pipe));



	BUG_ON(ret == NULL);

	return ret;
@@ -1194,12 +1193,11 @@ bool intel_ddi_pll_select(struct intel_crtc *intel_crtc, 
					  intel_encoder);

}



void intel_ddi_set_pipe_settings(struct drm_crtc *crtc)

void intel_ddi_set_pipe_settings(struct intel_crtc *crtc)

{

	struct drm_i915_private *dev_priv = to_i915(crtc->dev);

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);

	enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;

	int type = intel_encoder->type;

	uint32_t temp;
@@ -1207,7 +1205,7 @@ void intel_ddi_set_pipe_settings(struct drm_crtc *crtc) 
		WARN_ON(transcoder_is_dsi(cpu_transcoder));



		temp = TRANS_MSA_SYNC_CLK;

		switch (intel_crtc->config->pipe_bpp) {

		switch (crtc->config->pipe_bpp) {

		case 18:

			temp |= TRANS_MSA_6_BPC;

			break;
@@ -1227,12 +1225,10 @@ void intel_ddi_set_pipe_settings(struct drm_crtc *crtc) 
	}

}



void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state)

void intel_ddi_set_vc_payload_alloc(struct intel_crtc *crtc, bool state)

{

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;

	uint32_t temp;

	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));

	if (state == true)
@@ -1242,14 +1238,12 @@ void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state) 
	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);

}



void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)

void intel_ddi_enable_transcoder_func(struct intel_crtc *crtc)

{

	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);

	struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	enum pipe pipe = intel_crtc->pipe;

	enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	enum pipe pipe = crtc->pipe;

	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;

	enum port port = intel_ddi_get_encoder_port(intel_encoder);

	int type = intel_encoder->type;

	uint32_t temp;
@@ -1258,7 +1252,7 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) 
	temp = TRANS_DDI_FUNC_ENABLE;

	temp |= TRANS_DDI_SELECT_PORT(port);



	switch (intel_crtc->config->pipe_bpp) {

	switch (crtc->config->pipe_bpp) {

	case 18:

		temp |= TRANS_DDI_BPC_6;

		break;
@@ -1275,9 +1269,9 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) 
		BUG();

	}



	if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_PVSYNC)

	if (crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_PVSYNC)

		temp |= TRANS_DDI_PVSYNC;

	if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_PHSYNC)

	if (crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_PHSYNC)

		temp |= TRANS_DDI_PHSYNC;



	if (cpu_transcoder == TRANSCODER_EDP) {
@@ -1288,8 +1282,8 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) 
			 * using motion blur mitigation (which we don't

			 * support). */

			if (IS_HASWELL(dev_priv) &&

			    (intel_crtc->config->pch_pfit.enabled ||

			     intel_crtc->config->pch_pfit.force_thru))

			    (crtc->config->pch_pfit.enabled ||

			     crtc->config->pch_pfit.force_thru))

				temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;

			else

				temp |= TRANS_DDI_EDP_INPUT_A_ON;
@@ -1307,20 +1301,20 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc) 
	}



	if (type == INTEL_OUTPUT_HDMI) {

		if (intel_crtc->config->has_hdmi_sink)

		if (crtc->config->has_hdmi_sink)

			temp |= TRANS_DDI_MODE_SELECT_HDMI;

		else

			temp |= TRANS_DDI_MODE_SELECT_DVI;

	} else if (type == INTEL_OUTPUT_ANALOG) {

		temp |= TRANS_DDI_MODE_SELECT_FDI;

		temp |= (intel_crtc->config->fdi_lanes - 1) << 1;

		temp |= (crtc->config->fdi_lanes - 1) << 1;

	} else if (type == INTEL_OUTPUT_DP ||

		   type == INTEL_OUTPUT_EDP) {

		temp |= TRANS_DDI_MODE_SELECT_DP_SST;

		temp |= DDI_PORT_WIDTH(intel_crtc->config->lane_count);

		temp |= DDI_PORT_WIDTH(crtc->config->lane_count);

	} else if (type == INTEL_OUTPUT_DP_MST) {

		temp |= TRANS_DDI_MODE_SELECT_DP_MST;

		temp |= DDI_PORT_WIDTH(intel_crtc->config->lane_count);

		temp |= DDI_PORT_WIDTH(crtc->config->lane_count);

	} else {

		WARN(1, "Invalid encoder type %d for pipe %c\n",

		     intel_encoder->type, pipe_name(pipe));
@@ -1484,14 +1478,12 @@ static u64 intel_ddi_get_power_domains(struct intel_encoder *encoder) 
	return 0;

}



void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc)

void intel_ddi_enable_pipe_clock(struct intel_crtc *crtc)

{

	struct drm_crtc *crtc = &intel_crtc->base;

	struct drm_device *dev = crtc->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);

	enum port port = intel_ddi_get_encoder_port(intel_encoder);

	enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;

	enum transcoder cpu_transcoder = crtc->config->cpu_transcoder;



	if (cpu_transcoder != TRANSCODER_EDP)

		I915_WRITE(TRANS_CLK_SEL(cpu_transcoder),

drivers/gpu/drm/i915/intel_display.c

+4 −4
Original line number Diff line number Diff line
@@ -5385,9 +5385,9 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, 
	 */

	intel_color_load_luts(&pipe_config->base);



	intel_ddi_set_pipe_settings(crtc);

	intel_ddi_set_pipe_settings(intel_crtc);

	if (!transcoder_is_dsi(cpu_transcoder))

		intel_ddi_enable_transcoder_func(crtc);

		intel_ddi_enable_transcoder_func(intel_crtc);



	if (dev_priv->display.initial_watermarks != NULL)

		dev_priv->display.initial_watermarks(old_intel_state, pipe_config);
@@ -5400,7 +5400,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, 
		lpt_pch_enable(pipe_config);



	if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST))

		intel_ddi_set_vc_payload_alloc(crtc, true);

		intel_ddi_set_vc_payload_alloc(intel_crtc, true);



	assert_vblank_disabled(crtc);

	drm_crtc_vblank_on(crtc);
@@ -5522,7 +5522,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, 
		intel_disable_pipe(intel_crtc);



	if (intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_DP_MST))

		intel_ddi_set_vc_payload_alloc(crtc, false);

		intel_ddi_set_vc_payload_alloc(intel_crtc, false);



	if (!transcoder_is_dsi(cpu_transcoder))

		intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);

drivers/gpu/drm/i915/intel_drv.h

+3 −3
Original line number Diff line number Diff line
@@ -1230,14 +1230,14 @@ void hsw_fdi_link_train(struct intel_crtc *crtc, 
void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);

enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);

bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);

void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc);

void intel_ddi_enable_transcoder_func(struct intel_crtc *crtc);

void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,

				       enum transcoder cpu_transcoder);

void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);

void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);

bool intel_ddi_pll_select(struct intel_crtc *crtc,

			  struct intel_crtc_state *crtc_state);

void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);

void intel_ddi_set_pipe_settings(struct intel_crtc *crtc);

void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp);

bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);

bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv,
@@ -1250,7 +1250,7 @@ intel_ddi_get_crtc_new_encoder(struct intel_crtc_state *crtc_state); 
void intel_ddi_init_dp_buf_reg(struct intel_encoder *encoder);

void intel_ddi_clock_get(struct intel_encoder *encoder,

			 struct intel_crtc_state *pipe_config);

void intel_ddi_set_vc_payload_alloc(struct drm_crtc *crtc, bool state);

void intel_ddi_set_vc_payload_alloc(struct intel_crtc *crtc, bool state);

uint32_t ddi_signal_levels(struct intel_dp *intel_dp);

u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder);