Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e88230a3 authored by Neil Armstrong's avatar Neil Armstrong
Browse files

drm/meson: fix vsync buffer update 



The plane buffer address/stride/height was incorrectly updated in the
plane_atomic_update operation instead of the vsync irq.
This patch delays this operation in the vsync irq along with the
other plane delayed setup.

This issue was masked using legacy framebuffer and X11 modesetting, but
is clearly visible using gbm rendering when buffer is submitted late after
vblank, like using software decoding and OpenGL rendering in Kodi.
With this patch, tearing and other artifacts disappears completely.

Cc: Michal Lazo <michal.lazo@gmail.com>
Fixes: bbbe775e ("drm: Add support for Amlogic Meson Graphic Controller")
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Acked-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1518689976-23292-1-git-send-email-narmstrong@baylibre.com
parent b8ff1802

drivers/gpu/drm/meson/meson_crtc.c

+6 −0
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ 
#include "meson_venc.h"

#include "meson_vpp.h"

#include "meson_viu.h"

#include "meson_canvas.h"

#include "meson_registers.h"



/* CRTC definition */
@@ -192,6 +193,11 @@ void meson_crtc_irq(struct meson_drm *priv) 
		} else

			meson_vpp_disable_interlace_vscaler_osd1(priv);



		meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1,

			   priv->viu.osd1_addr, priv->viu.osd1_stride,

			   priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE,

			   MESON_CANVAS_BLKMODE_LINEAR);



		/* Enable OSD1 */

		writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND,

				    priv->io_base + _REG(VPP_MISC));

drivers/gpu/drm/meson/meson_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -43,6 +43,9 @@ struct meson_drm { 
		bool osd1_commit;

		uint32_t osd1_ctrl_stat;

		uint32_t osd1_blk0_cfg[5];

		uint32_t osd1_addr;

		uint32_t osd1_stride;

		uint32_t osd1_height;

	} viu;



	struct {

drivers/gpu/drm/meson/meson_plane.c

+3 −4
Original line number Diff line number Diff line
@@ -164,10 +164,9 @@ static void meson_plane_atomic_update(struct drm_plane *plane, 
	/* Update Canvas with buffer address */

	gem = drm_fb_cma_get_gem_obj(fb, 0);



	meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1,

			   gem->paddr, fb->pitches[0],

			   fb->height, MESON_CANVAS_WRAP_NONE,

			   MESON_CANVAS_BLKMODE_LINEAR);

	priv->viu.osd1_addr = gem->paddr;

	priv->viu.osd1_stride = fb->pitches[0];

	priv->viu.osd1_height = fb->height;



	spin_unlock_irqrestore(&priv->drm->event_lock, flags);

}