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Commit e157ea30 authored by Carolyn Wyborny's avatar Carolyn Wyborny Committed by Jeff Kirsher
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i40e/i40evf: Update RSS configuration 



This patch changes the RSS configuration to set table size
and write to hardware to confirm RSS table size being used.

Change-ID: I455a4c09c9dd479f5791ee1f09fdc83ff9908df5
Signed-off-by: default avatarCarolyn Wyborny <carolyn.wyborny@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent cc70b080

drivers/net/ethernet/intel/i40e/i40e.h

+1 −0
Original line number Diff line number Diff line
@@ -350,6 +350,7 @@ struct i40e_pf { 
	u32 rx_hwtstamp_cleared;

	bool ptp_tx;

	bool ptp_rx;

	u16 rss_table_size;

};



struct i40e_mac_filter {

drivers/net/ethernet/intel/i40e/i40e_common.c

+1 −6
Original line number Diff line number Diff line
@@ -1839,7 +1839,6 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, 
	struct i40e_aqc_list_capabilities_element_resp *cap;

	u32 number, logical_id, phys_id;

	struct i40e_hw_capabilities *p;

	u32 reg_val;

	u32 i = 0;

	u16 id;
@@ -1910,11 +1909,7 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, 
			break;

		case I40E_DEV_FUNC_CAP_RSS:

			p->rss = true;

			reg_val = rd32(hw, I40E_PFQF_CTL_0);

			if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)

			p->rss_table_size = number;

			else

				p->rss_table_size = 128;

			p->rss_table_entry_width = logical_id;

			break;

		case I40E_DEV_FUNC_CAP_RX_QUEUES:

drivers/net/ethernet/intel/i40e/i40e_main.c

+13 −1
Original line number Diff line number Diff line
@@ -6599,6 +6599,7 @@ static int i40e_config_rss(struct i40e_pf *pf) 
	u32 lut = 0;

	int i, j;

	u64 hena;

	u32 reg_val;



	/* Fill out hash function seed */

	for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
@@ -6611,8 +6612,19 @@ static int i40e_config_rss(struct i40e_pf *pf) 
	wr32(hw, I40E_PFQF_HENA(0), (u32)hena);

	wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));



	/* Check capability and Set table size and register per hw expectation*/

	reg_val = rd32(hw, I40E_PFQF_CTL_0);

	if (hw->func_caps.rss_table_size == 512) {

		reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;

		pf->rss_table_size = 512;

	} else {

		pf->rss_table_size = 128;

		reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;

	}

	wr32(hw, I40E_PFQF_CTL_0, reg_val);



	/* Populate the LUT with max no. of queues in round robin fashion */

	for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {

	for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {



		/* The assumption is that lan qp count will be the highest

		 * qp count for any PF VSI that needs RSS.

drivers/net/ethernet/intel/i40e/i40e_type.h

+3 −0
Original line number Diff line number Diff line
@@ -1165,4 +1165,7 @@ enum i40e_reset_type { 
	I40E_RESET_GLOBR	= 2,

	I40E_RESET_EMPR		= 3,

};



/* RSS Hash Table Size */

#define I40E_PFQF_CTL_0_HASHLUTSIZE_512	0x00010000

#endif /* _I40E_TYPE_H_ */

drivers/net/ethernet/intel/i40evf/i40e_type.h

+3 −0
Original line number Diff line number Diff line
@@ -1165,4 +1165,7 @@ enum i40e_reset_type { 
	I40E_RESET_GLOBR	= 2,

	I40E_RESET_EMPR		= 3,

};



/* RSS Hash Table Size */

#define I40E_PFQF_CTL_0_HASHLUTSIZE_512	0x00010000

#endif /* _I40E_TYPE_H_ */