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Commit e07ac3a0 authored by Zhenyu Wang's avatar Zhenyu Wang Committed by Chris Wilson
Browse files

drm/i915; Don't apply Ironlake FDI clock workaround to Sandybridge 



Signed-off-by: default avatarZhenyu Wang <zhenyu.z.wang@intel.com>
Cc: stable@kernel.org
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 5e84e1a4

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -1321,6 +1321,7 @@ static inline void i915_write(struct drm_i915_private *dev_priv, u32 reg, 


#define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)

#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)

#define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)



#define PRIMARY_RINGBUFFER_SIZE         (128*1024)

drivers/gpu/drm/i915/intel_display.c

+4 −3
Original line number Diff line number Diff line
@@ -2212,6 +2212,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) 
	udelay(100);



	/* Ironlake workaround, disable clock pointer after downing FDI */

	if (HAS_PCH_IBX(dev))

		I915_WRITE(FDI_RX_CHICKEN(pipe),

			   I915_READ(FDI_RX_CHICKEN(pipe) &

				     ~FDI_RX_PHASE_SYNC_POINTER_ENABLE));