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Commit dd44c957 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'imx-drm-fixes-2017-06-08' of git://git.pengutronix.de/git/pza/linux into drm-fixes

imx-drm: PRE clock gating, panelless LDB, and VDIC CSI selection fixes

- Keep the external clock input to the PRE ungated and only use the internal
  soft reset to keep the module in low power state, to avoid sporadic startup
  failures.
- Ignore -ENODEV return values from drm_of_find_panel_or_bridge in the LDB
  driver to fix probing for devices that still do not specify a panel in the
  device tree.
- Fix the CSI input selection to the VDIC. According to experiments, the real
  behaviour differs a bit from the documentation.

* tag 'imx-drm-fixes-2017-06-08' of git://git.pengutronix.de/git/pza/linux:
  gpu: ipu-v3: Fix CSI selection for VDIC
  drm/imx: imx-ldb: Accept drm_of_find_panel_or_bridge failure
  gpu: ipu-v3: pre: only use internal clock gating
parents e5b4ab1f b7dfee24
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+1 −1
Original line number Diff line number Diff line
@@ -673,7 +673,7 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
		ret = drm_of_find_panel_or_bridge(child,
						  imx_ldb->lvds_mux ? 4 : 2, 0,
						  &channel->panel, &channel->bridge);
		if (ret)
		if (ret && ret != -ENODEV)
			return ret;

		/* panel ddc only if there is no bridge */
+8 −7
Original line number Diff line number Diff line
@@ -725,15 +725,16 @@ void ipu_set_ic_src_mux(struct ipu_soc *ipu, int csi_id, bool vdi)
	spin_lock_irqsave(&ipu->lock, flags);

	val = ipu_cm_read(ipu, IPU_CONF);
	if (vdi) {
	if (vdi)
		val |= IPU_CONF_IC_INPUT;
	} else {
	else
		val &= ~IPU_CONF_IC_INPUT;

	if (csi_id == 1)
		val |= IPU_CONF_CSI_SEL;
	else
		val &= ~IPU_CONF_CSI_SEL;
	}

	ipu_cm_write(ipu, val, IPU_CONF);

	spin_unlock_irqrestore(&ipu->lock, flags);
+5 −8
Original line number Diff line number Diff line
@@ -131,8 +131,6 @@ int ipu_pre_get(struct ipu_pre *pre)
	if (pre->in_use)
		return -EBUSY;

	clk_prepare_enable(pre->clk_axi);

	/* first get the engine out of reset and remove clock gating */
	writel(0, pre->regs + IPU_PRE_CTRL);

@@ -149,12 +147,7 @@ int ipu_pre_get(struct ipu_pre *pre)

void ipu_pre_put(struct ipu_pre *pre)
{
	u32 val;

	val = IPU_PRE_CTRL_SFTRST | IPU_PRE_CTRL_CLKGATE;
	writel(val, pre->regs + IPU_PRE_CTRL);

	clk_disable_unprepare(pre->clk_axi);
	writel(IPU_PRE_CTRL_SFTRST, pre->regs + IPU_PRE_CTRL);

	pre->in_use = false;
}
@@ -249,6 +242,8 @@ static int ipu_pre_probe(struct platform_device *pdev)
	if (!pre->buffer_virt)
		return -ENOMEM;

	clk_prepare_enable(pre->clk_axi);

	pre->dev = dev;
	platform_set_drvdata(pdev, pre);
	mutex_lock(&ipu_pre_list_mutex);
@@ -268,6 +263,8 @@ static int ipu_pre_remove(struct platform_device *pdev)
	available_pres--;
	mutex_unlock(&ipu_pre_list_mutex);

	clk_disable_unprepare(pre->clk_axi);

	if (pre->buffer_virt)
		gen_pool_free(pre->iram, (unsigned long)pre->buffer_virt,
			      IPU_PRE_MAX_WIDTH * IPU_PRE_NUM_SCANLINES * 4);