Loading arch/arm64/boot/dts/qcom/lito-gdsc.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -91,7 +91,7 @@ /* DISP_CC GDSC */ mdss_core_gdsc: qcom,gdsc@af03000 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; reg = <0xaf03000 0x4>; regulator-name = "mdss_core_gdsc"; qcom,support-hw-trigger; Loading arch/arm64/boot/dts/qcom/lito.dtsi +13 −7 Original line number Diff line number Diff line Loading @@ -911,6 +911,17 @@ #reset-cells = <1>; }; dispcc: qcom,dispcc { compatible = "qcom,lito-dispcc"; reg = <0xaf00000 0x20000>; reg-names = "cc_base"; clock-names = "cfg_ahb_clk"; clocks = <&gcc GCC_DISP_AHB_CLK>; vdd_cx-supply = <&VDD_CX_LEVEL>; #clock-cells = <1>; #reset-cells = <1>; }; ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xe00>; /* PHY regs */ reg-names = "phy_mem"; Loading Loading @@ -1044,13 +1055,6 @@ #reset-cells = <1>; }; dispcc: qcom,dispcc { compatible = "qcom,dummycc"; clock-output-names = "dispcc_clocks"; #clock-cells = <1>; #reset-cells = <1>; }; gpucc: qcom,gpucc { compatible = "qcom,dummycc"; clock-output-names = "gpucc_clocks"; Loading Loading @@ -1485,6 +1489,8 @@ }; &mdss_core_gdsc { clock-names = "ahb_clk"; clocks = <&gcc GCC_DISP_AHB_CLK>; status = "ok"; }; Loading arch/arm64/configs/vendor/lito_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -364,6 +364,7 @@ CONFIG_QCOM_CLK_RPMH=y CONFIG_SM_GCC_LITO=y CONFIG_SM_VIDEOCC_LITO=y CONFIG_SM_CAMCC_LITO=y CONFIG_SM_DISPCC_LITO=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_MAILBOX=y Loading drivers/clk/qcom/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -375,3 +375,12 @@ config SM_CAMCC_LITO LITO devices. Say Y if you want to support camera devices and functionality such as capturing pictures. config SM_DISPCC_LITO tristate "LITO Display Clock Controller" depends on COMMON_CLK_QCOM help Support for the display clock controller on Qualcomm Technologies, Inc. LITO devices. Say Y if you want to support display devices and functionality such as splash screen. drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,7 @@ obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o obj-$(CONFIG_SM_CAMCC_LITO) += camcc-lito.o obj-$(CONFIG_SM_DISPCC_LITO) += dispcc-lito.o obj-$(CONFIG_SM_GCC_LITO) += gcc-lito.o obj-$(CONFIG_SM_VIDEOCC_LITO) += videocc-lito.o obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o Loading Loading
arch/arm64/boot/dts/qcom/lito-gdsc.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -91,7 +91,7 @@ /* DISP_CC GDSC */ mdss_core_gdsc: qcom,gdsc@af03000 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; reg = <0xaf03000 0x4>; regulator-name = "mdss_core_gdsc"; qcom,support-hw-trigger; Loading
arch/arm64/boot/dts/qcom/lito.dtsi +13 −7 Original line number Diff line number Diff line Loading @@ -911,6 +911,17 @@ #reset-cells = <1>; }; dispcc: qcom,dispcc { compatible = "qcom,lito-dispcc"; reg = <0xaf00000 0x20000>; reg-names = "cc_base"; clock-names = "cfg_ahb_clk"; clocks = <&gcc GCC_DISP_AHB_CLK>; vdd_cx-supply = <&VDD_CX_LEVEL>; #clock-cells = <1>; #reset-cells = <1>; }; ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xe00>; /* PHY regs */ reg-names = "phy_mem"; Loading Loading @@ -1044,13 +1055,6 @@ #reset-cells = <1>; }; dispcc: qcom,dispcc { compatible = "qcom,dummycc"; clock-output-names = "dispcc_clocks"; #clock-cells = <1>; #reset-cells = <1>; }; gpucc: qcom,gpucc { compatible = "qcom,dummycc"; clock-output-names = "gpucc_clocks"; Loading Loading @@ -1485,6 +1489,8 @@ }; &mdss_core_gdsc { clock-names = "ahb_clk"; clocks = <&gcc GCC_DISP_AHB_CLK>; status = "ok"; }; Loading
arch/arm64/configs/vendor/lito_defconfig +1 −0 Original line number Diff line number Diff line Loading @@ -364,6 +364,7 @@ CONFIG_QCOM_CLK_RPMH=y CONFIG_SM_GCC_LITO=y CONFIG_SM_VIDEOCC_LITO=y CONFIG_SM_CAMCC_LITO=y CONFIG_SM_DISPCC_LITO=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_MAILBOX=y Loading
drivers/clk/qcom/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -375,3 +375,12 @@ config SM_CAMCC_LITO LITO devices. Say Y if you want to support camera devices and functionality such as capturing pictures. config SM_DISPCC_LITO tristate "LITO Display Clock Controller" depends on COMMON_CLK_QCOM help Support for the display clock controller on Qualcomm Technologies, Inc. LITO devices. Say Y if you want to support display devices and functionality such as splash screen.
drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -53,6 +53,7 @@ obj-$(CONFIG_SDM_DISPCC_845) += dispcc-sdm845.o obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o obj-$(CONFIG_SM_CAMCC_LITO) += camcc-lito.o obj-$(CONFIG_SM_DISPCC_LITO) += dispcc-lito.o obj-$(CONFIG_SM_GCC_LITO) += gcc-lito.o obj-$(CONFIG_SM_VIDEOCC_LITO) += videocc-lito.o obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o Loading