Loading soc/swr-mstr-ctrl.c +3 −3 Original line number Original line Diff line number Diff line Loading @@ -2490,9 +2490,6 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm) reg[len] = SWRM_COMP_CFG_ADDR; reg[len] = SWRM_COMP_CFG_ADDR; value[len++] = 0x02; value[len++] = 0x02; reg[len] = SWRM_COMP_CFG_ADDR; value[len++] = 0x03; reg[len] = SWRM_INTERRUPT_CLEAR; reg[len] = SWRM_INTERRUPT_CLEAR; value[len++] = 0xFFFFFFFF; value[len++] = 0xFFFFFFFF; Loading @@ -2504,6 +2501,9 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm) reg[len] = SWR_MSTR_RX_SWRM_CPU_INTERRUPT_EN; reg[len] = SWR_MSTR_RX_SWRM_CPU_INTERRUPT_EN; value[len++] = swrm->intr_mask; value[len++] = swrm->intr_mask; reg[len] = SWRM_COMP_CFG_ADDR; value[len++] = 0x03; swr_master_bulk_write(swrm, reg, value, len); swr_master_bulk_write(swrm, reg, value, len); if (!swrm_check_link_status(swrm, 0x1)) { if (!swrm_check_link_status(swrm, 0x1)) { Loading Loading
soc/swr-mstr-ctrl.c +3 −3 Original line number Original line Diff line number Diff line Loading @@ -2490,9 +2490,6 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm) reg[len] = SWRM_COMP_CFG_ADDR; reg[len] = SWRM_COMP_CFG_ADDR; value[len++] = 0x02; value[len++] = 0x02; reg[len] = SWRM_COMP_CFG_ADDR; value[len++] = 0x03; reg[len] = SWRM_INTERRUPT_CLEAR; reg[len] = SWRM_INTERRUPT_CLEAR; value[len++] = 0xFFFFFFFF; value[len++] = 0xFFFFFFFF; Loading @@ -2504,6 +2501,9 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm) reg[len] = SWR_MSTR_RX_SWRM_CPU_INTERRUPT_EN; reg[len] = SWR_MSTR_RX_SWRM_CPU_INTERRUPT_EN; value[len++] = swrm->intr_mask; value[len++] = swrm->intr_mask; reg[len] = SWRM_COMP_CFG_ADDR; value[len++] = 0x03; swr_master_bulk_write(swrm, reg, value, len); swr_master_bulk_write(swrm, reg, value, len); if (!swrm_check_link_status(swrm, 0x1)) { if (!swrm_check_link_status(swrm, 0x1)) { Loading