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Commit d6ebe485 authored by Tina Zhang's avatar Tina Zhang Committed by Greg Kroah-Hartman
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drm/i915/gvt: Fix tiled memory decoding bug on BDW

commit a40fa231bb64b33e2cd54cf8ef44a9f89875fa11 upstream.

Commit b244ffa1 ("drm/i915/gvt: Fix drm_format_mod value for vGPU
plane") introduced a regression issue to the tiled memory decoding on BDW.

This patch can fix this issue.

Here is the issue detail: https://github.com/intel/gvt-linux/issues/61



v1->v2:
- Refine the commit message. (Zhenyu)

Fixes: b244ffa1("drm/i915/gvt: Fix drm_format_mod value for vGPU plane")
Signed-off-by: default avatarTina Zhang <tina.zhang@intel.com>
Cc: stable@vger.kernel.org # v4.19+
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 683ef526
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+1 −1
Original line number Diff line number Diff line
@@ -235,7 +235,7 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,
		plane->bpp = skl_pixel_formats[fmt].bpp;
		plane->drm_format = skl_pixel_formats[fmt].drm_format;
	} else {
		plane->tiled = !!(val & DISPPLANE_TILED);
		plane->tiled = val & DISPPLANE_TILED;
		fmt = bdw_format_to_drm(val & DISPPLANE_PIXFORMAT_MASK);
		plane->bpp = bdw_pixel_formats[fmt].bpp;
		plane->drm_format = bdw_pixel_formats[fmt].drm_format;