clk: qcom: mdss: remove recalculation of vco rate for 10nm pll

In continuous splash use cases, the display is enabled in
the boot-loader. During display kernel probe, to enable clocks,
the rate is calculated by reading the hardware registers before
the corresponding software rate is set. At times when these rates
are nearly equal, the call for set rate never happens. This can
cause abnormal behavior. In this change during hand-off we don't
recalculate the clock rate to ensure the software programs the clock
registers accordingly.

Change-Id: Ibe512067a134856c4f4364f57a80d50214e88397
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>