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Commit c41d31f7 authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Ulf Hansson
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ARM: dts: rockchip: add tuning related settings to veyron devices 



This allows the tuning code to run and use higher speeds on capable cards.

Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent f71ddc58

arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi

+6 −1
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@ 
	regulators {

		vccio_sd: LDO_REG4 {

			regulator-name = "vccio_sd";

			regulator-min-microvolt = <3300000>;

			regulator-min-microvolt = <1800000>;

			regulator-max-microvolt = <3300000>;

			regulator-state-mem {

				regulator-off-in-suspend;
@@ -116,7 +116,12 @@ 
	cap-sd-highspeed;

	card-detect-delay = <200>;

	cd-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;

	rockchip,default-sample-phase = <90>;

	num-slots = <1>;

	sd-uhs-sdr12;

	sd-uhs-sdr25;

	sd-uhs-sdr50;

	sd-uhs-sdr104;

	vmmc-supply = <&vcc33_sd>;

	vqmmc-supply = <&vccio_sd>;

};

arch/arm/boot/dts/rk3288-veyron.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -149,7 +149,9 @@ 
	broken-cd;

	bus-width = <8>;

	cap-mmc-highspeed;

	rockchip,default-sample-phase = <158>;

	disable-wp;

	mmc-hs200-1_8v;

	mmc-pwrseq = <&emmc_pwrseq>;

	non-removable;

	num-slots = <1>;
@@ -355,6 +357,10 @@ 
	num-slots = <1>;

	pinctrl-names = "default";

	pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;

	sd-uhs-sdr12;

	sd-uhs-sdr25;

	sd-uhs-sdr50;

	sd-uhs-sdr104;

	vmmc-supply = <&vcc33_sys>;

	vqmmc-supply = <&vcc18_wl>;

};