msm: kgsl: Set correct values for SMMU protect register for A3xx

For programming the CP Protect register for SMMU in A3xx GPU, pass
correct values for SMMU registers base offset and the count of
registers to be protected.

Change-Id: I9fa809db79efc79bb7a59304fa2b4607ed1fc567
Signed-off-by: Archana Sriram <apsrir@codeaurora.org>