clk: qcom: gdsc-regulator: Remove polling logic when disabling GDSC HW CTL

There is no mandate in hardware that the SW_COLLAPSE bit of the
GDSC be cleared while disabling its hardware control. Remove the
polling logic to check whether the GDSC is enabled via the SW
vote on clearing the HW_CONTROL bit.

Change-Id: Ib08b627a3502d1096ae7d05ef077a50b95fc80d2
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>