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Commit be40840a authored by Hareesh Gundu's avatar Hareesh Gundu
Browse files

msm: kgsl: Update clk_set_rate() sequence for bimc_gpu_clk 



Upstream clock driver need the below sequence for RPM based clocks.
    1)	clk_prepare_enable()
    2)	clk_set_rate()

For other GCC/GPU clock controllers can follow any sequence.

Change-Id: I690115a76860dc9740695e07b865501479e7f271
Signed-off-by: default avatarHareesh Gundu <hareeshg@codeaurora.org>
parent ff9ef294

drivers/gpu/msm/kgsl_pwrctrl.c

+3 −3
Original line number Diff line number Diff line
@@ -669,12 +669,12 @@ void kgsl_pwrctrl_pwrlevel_change(struct kgsl_device *device, 
	if (pwr->gpu_bimc_int_clk) {

		if (pwr->active_pwrlevel == 0 &&

				!pwr->gpu_bimc_interface_enabled) {

			kgsl_pwrctrl_clk_set_rate(pwr->gpu_bimc_int_clk,

					pwr->gpu_bimc_int_clk_freq,

					"bimc_gpu_clk");

			_bimc_clk_prepare_enable(device,

					pwr->gpu_bimc_int_clk,

					"bimc_gpu_clk");

			kgsl_pwrctrl_clk_set_rate(pwr->gpu_bimc_int_clk,

					pwr->gpu_bimc_int_clk_freq,

					"bimc_gpu_clk");

			pwr->gpu_bimc_interface_enabled = true;

		} else if (pwr->previous_pwrlevel == 0

				&& pwr->gpu_bimc_interface_enabled) {