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Commit bb034cb5 authored by Thierry Reding's avatar Thierry Reding Committed by Stephen Warren
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ARM: tegra: Enable PCIe controller on Beaver



PCIe lane 0 is connected to an onboard Gigabit Ethernet (RTL8168evl) and
lane 4 is routed to the board's miniPCIe slot.

Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 89e7ada4
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