Revert "mhi: core: add timesync logs after resume completes"

This reverts commit 279df8f0.
Commit 279df8f0 ("mhi: core: add timesync logs after
resume completes") adds timesync register read which could
have latency of the order of ~msecs if device is in L1ss
sleep, causing the CPU to be stalled.

Change-Id: If3f0084408c6ad052427bf3bc905d272fed55f81
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>