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Commit b6d72ccb authored by Naman Padhiar's avatar Naman Padhiar
Browse files

ARM: dts: msm: Add icnss node for lito 

Add ICNSS node to enable wlan for lito, add entry for membase,
CE interrupt vectors.

Change-Id: Id26835dbe58aade9a02d2d18f86d0d54f7d3b214
parent 634e651b

qcom/lito.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -2125,6 +2125,28 @@ 
		qcom,iommu-dma-addr-pool = <0x40000000 0x20000000>;

		qcom,iommu-dma = "fastmap";

	};



	icnss: qcom,icnss@18800000 {

		status = "disabled";

		compatible = "qcom,icnss";

		reg = <0x18800000 0x800000>;

		reg-names = "membase";

		interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH /* CE0 */ >,

			     <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH /* CE1 */ >,

			     <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH /* CE2 */ >,

			     <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH /* CE3 */ >,

			     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH /* CE4 */ >,

			     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH /* CE5 */ >,

			     <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH /* CE6 */ >,

			     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH /* CE7 */ >,

			     <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH /* CE8 */ >,

			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH /* CE9 */ >,

			     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH /* CE10 */ >,

			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH /* CE11 */ >;

		qcom,smmu-s1-bypass;

		qcom,wlan-msa-memory = <0x200000>;

		qcom,wlan-msa-fixed-region = <&pil_wlan_fw_mem>;

	};

};



#include "lito-pinctrl.dtsi"