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Commit afeddf50 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Reduce context alignment 



No hardware was ever shipped that needed more than 4096 byte alignment
and future hardware will not use this legacy path. So reduce the
alignment to make it easier and quicker to launch workloads.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170227135913.8056-3-chris@chris-wilson.co.uk
parent 12946ece

drivers/gpu/drm/i915/i915_gem_context.c

+0 −17
Original line number Diff line number Diff line
@@ -92,21 +92,6 @@ 


#define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1



/* This is a HW constraint. The value below is the largest known requirement

 * I've seen in a spec to date, and that was a workaround for a non-shipping

 * part. It should be safe to decrease this, but it's more future proof as is.

 */

#define GEN6_CONTEXT_ALIGN (64<<10)

#define GEN7_CONTEXT_ALIGN I915_GTT_MIN_ALIGNMENT



static size_t get_context_alignment(struct drm_i915_private *dev_priv)

{

	if (IS_GEN6(dev_priv))

		return GEN6_CONTEXT_ALIGN;



	return GEN7_CONTEXT_ALIGN;

}



static int get_context_size(struct drm_i915_private *dev_priv)

{

	int ret;
@@ -281,8 +266,6 @@ __create_hw_context(struct drm_i915_private *dev_priv, 
	list_add_tail(&ctx->link, &dev_priv->context_list);

	ctx->i915 = dev_priv;



	ctx->ggtt_alignment = get_context_alignment(dev_priv);



	if (dev_priv->hw_context_size) {

		struct drm_i915_gem_object *obj;

		struct i915_vma *vma;

drivers/gpu/drm/i915/i915_gem_context.h

+0 −2
Original line number Diff line number Diff line
@@ -140,8 +140,6 @@ struct i915_gem_context { 
	 */

	int priority;



	/** ggtt_alignment: alignment restriction for context objects */

	u32 ggtt_alignment;

	/** ggtt_offset_bias: placement restriction for context objects */

	u32 ggtt_offset_bias;

drivers/gpu/drm/i915/intel_ringbuffer.c

+2 −1
Original line number Diff line number Diff line
@@ -1431,7 +1431,8 @@ static int context_pin(struct i915_gem_context *ctx) 
			return ret;

	}



	return i915_vma_pin(vma, 0, ctx->ggtt_alignment, PIN_GLOBAL | PIN_HIGH);

	return i915_vma_pin(vma, 0, I915_GTT_MIN_ALIGNMENT,

			    PIN_GLOBAL | PIN_HIGH);

}



static int intel_ring_context_pin(struct intel_engine_cs *engine,