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Commit 12946ece authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Remove redundant TLB invalidate on switching ppgtt 



We are required to reload the TLBs around ppgtt switches. However, we
already do an unconditional TLB invalidate before every batch and a flush
afterwards, so this condition is already satisfied without extra flushes
around the LRI instructions.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170227135913.8056-2-chris@chris-wilson.co.uk
parent 20fe17aa

drivers/gpu/drm/i915/i915_gem_gtt.c

+0 −17
Original line number Diff line number Diff line
@@ -1464,13 +1464,8 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt, 
{

	struct intel_engine_cs *engine = req->engine;

	u32 *cs;

	int ret;



	/* NB: TLBs must be flushed and invalidated before a switch */

	ret = engine->emit_flush(req, EMIT_INVALIDATE | EMIT_FLUSH);

	if (ret)

		return ret;



	cs = intel_ring_begin(req, 6);

	if (IS_ERR(cs))

		return PTR_ERR(cs);
@@ -1491,13 +1486,8 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt, 
{

	struct intel_engine_cs *engine = req->engine;

	u32 *cs;

	int ret;



	/* NB: TLBs must be flushed and invalidated before a switch */

	ret = engine->emit_flush(req, EMIT_INVALIDATE | EMIT_FLUSH);

	if (ret)

		return ret;



	cs = intel_ring_begin(req, 6);

	if (IS_ERR(cs))

		return PTR_ERR(cs);
@@ -1510,13 +1500,6 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt, 
	*cs++ = MI_NOOP;

	intel_ring_advance(req, cs);



	/* XXX: RCS is the only one to auto invalidate the TLBs? */

	if (engine->id != RCS) {

		ret = engine->emit_flush(req, EMIT_INVALIDATE | EMIT_FLUSH);

		if (ret)

			return ret;

	}



	return 0;

}